FPGA based hybrid computing platform for ESS linac simulator
(2018) 4th IEEE Nordic Circuits and Systems Conference, NORCAS 2018: NORCHIP and International Symposium of System-on-Chip, SoC 2018- Abstract
This paper presents a scalable and high-Throughput hybrid computing platform for the real-Time multi-particle based Linac (Linear accelerator) simulation model to be used at the European Spallation Source (ESS). The multi-particle simulation model with non-linear modeling is needed to provide a realistic behavior of the particle beam for reducing the losses at the superconducting structures. The computation complexity of the simulations can reach 1012 matrix multiplication operations for a test case of 106 beam particles simulated over 106 cells. An OpenCL (Open Computing Language) based framework is used to map the processing intensive parts of the simulation model efficiently to any configuration of a... (More)
This paper presents a scalable and high-Throughput hybrid computing platform for the real-Time multi-particle based Linac (Linear accelerator) simulation model to be used at the European Spallation Source (ESS). The multi-particle simulation model with non-linear modeling is needed to provide a realistic behavior of the particle beam for reducing the losses at the superconducting structures. The computation complexity of the simulations can reach 1012 matrix multiplication operations for a test case of 106 beam particles simulated over 106 cells. An OpenCL (Open Computing Language) based framework is used to map the processing intensive parts of the simulation model efficiently to any configuration of a CPU-, GPU-and FPGA-based platform. Optimizations using data precision strategies have also been explored to further improve the throughput after reaching memory access saturation. We are able to achieve up to 89 × speed up compared to a C++ benchmark of the same system.
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- author
- Jeevaraj, Arun ; Laface, Emmanuel LU ; Donna, Maurizio ; Edman, Fredrik LU and Liu, Liang LU
- organization
- publishing date
- 2018-12-11
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- 2018 IEEE Nordic Circuits and Systems Conference, NORCAS 2018 : NORCHIP and International Symposium of System-on-Chip, SoC 2018 - Proceedings - NORCHIP and International Symposium of System-on-Chip, SoC 2018 - Proceedings
- editor
- Nurmi, Jari ; Ellervee, Peeter ; Mihhailov, Juri ; Tammemae, Kalle and Jenihhin, Maksim
- article number
- 8573518
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- 4th IEEE Nordic Circuits and Systems Conference, NORCAS 2018: NORCHIP and International Symposium of System-on-Chip, SoC 2018
- conference location
- Tallinn, Estonia
- conference dates
- 2018-10-30 - 2018-10-31
- external identifiers
-
- scopus:85060572308
- ISBN
- 9781538676561
- DOI
- 10.1109/NORCHIP.2018.8573518
- language
- English
- LU publication?
- yes
- id
- 0dec190c-bb46-48c3-afb0-365766c99645
- date added to LUP
- 2019-02-08 11:56:27
- date last changed
- 2024-03-02 20:00:29
@inproceedings{0dec190c-bb46-48c3-afb0-365766c99645, abstract = {{<p>This paper presents a scalable and high-Throughput hybrid computing platform for the real-Time multi-particle based Linac (Linear accelerator) simulation model to be used at the European Spallation Source (ESS). The multi-particle simulation model with non-linear modeling is needed to provide a realistic behavior of the particle beam for reducing the losses at the superconducting structures. The computation complexity of the simulations can reach 10<sup>12</sup> matrix multiplication operations for a test case of 10<sup>6</sup> beam particles simulated over 10<sup>6</sup> cells. An OpenCL (Open Computing Language) based framework is used to map the processing intensive parts of the simulation model efficiently to any configuration of a CPU-, GPU-and FPGA-based platform. Optimizations using data precision strategies have also been explored to further improve the throughput after reaching memory access saturation. We are able to achieve up to 89 × speed up compared to a C++ benchmark of the same system.</p>}}, author = {{Jeevaraj, Arun and Laface, Emmanuel and Donna, Maurizio and Edman, Fredrik and Liu, Liang}}, booktitle = {{2018 IEEE Nordic Circuits and Systems Conference, NORCAS 2018 : NORCHIP and International Symposium of System-on-Chip, SoC 2018 - Proceedings}}, editor = {{Nurmi, Jari and Ellervee, Peeter and Mihhailov, Juri and Tammemae, Kalle and Jenihhin, Maksim}}, isbn = {{9781538676561}}, language = {{eng}}, month = {{12}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{FPGA based hybrid computing platform for ESS linac simulator}}, url = {{http://dx.doi.org/10.1109/NORCHIP.2018.8573518}}, doi = {{10.1109/NORCHIP.2018.8573518}}, year = {{2018}}, }