Combined scheduling and instruction selection for processors with reconfigurable cell fabric
Floch, Antoine ; Wolinski, Christophe and Kuchcinski, Krzysztof LU
(2010)
21st IEEE International Conference on Application-specific Systems, Architectures and Processors
p.167-174
- Abstract
- This paper presents a new method, based on constraint programming, for modeling and solving scheduling and instruction selection for processors extended with a functionally reconfigurable cell fabric. Our method models parallel reconfigurable architectures, the selection of application specific computational patterns and application scheduling. It takes also into account architectural constraints. The method provides efficient design space exploration that selects existing processor instructions and new instructions implementing computational patterns on a reconfigurable cell fabric. All instructions are scheduled enabling parallel instruction execution. Our method can be used directly for VLIW architectures by relaxing constraints... (More)
- This paper presents a new method, based on constraint programming, for modeling and solving scheduling and instruction selection for processors extended with a functionally reconfigurable cell fabric. Our method models parallel reconfigurable architectures, the selection of application specific computational patterns and application scheduling. It takes also into account architectural constraints. The method provides efficient design space exploration that selects existing processor instructions and new instructions implementing computational patterns on a reconfigurable cell fabric. All instructions are scheduled enabling parallel instruction execution. Our method can be used directly for VLIW architectures by relaxing constraints concerning cell-processor data transfers. MediaBench and MiBench benchmarks have been used for evaluation and we obtained optimal results in many cases. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1607152
- author
- Floch, Antoine
; Wolinski, Christophe
and Kuchcinski, Krzysztof
LU
- organization
- publishing date
- 2010
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- 21st IEEE International Conference on Application-specific Systems Architectures and Processors (ASAP), 2010
- pages
- 167 - 174
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- 21st IEEE International Conference on Application-specific Systems, Architectures and Processors
- conference location
- Rennes, France
- conference dates
- 2010-07-07 - 2010-07-09
- external identifiers
-
- scopus:77955862764
- ISSN
- 2160-0511
- ISBN
- 978-1-4244-6966-6
- DOI
- 10.1109/ASAP.2010.5540997
- project
- Embedded Applications Software Engineering
- language
- English
- LU publication?
- yes
- id
- 84a28b2e-5eeb-4a9e-9d69-f1cfee6bbb79 (old id 1607152)
- date added to LUP
- 2016-04-01 14:43:59
- date last changed
- 2022-01-28 02:14:44
@inproceedings{84a28b2e-5eeb-4a9e-9d69-f1cfee6bbb79,
abstract = {{This paper presents a new method, based on constraint programming, for modeling and solving scheduling and instruction selection for processors extended with a functionally reconfigurable cell fabric. Our method models parallel reconfigurable architectures, the selection of application specific computational patterns and application scheduling. It takes also into account architectural constraints. The method provides efficient design space exploration that selects existing processor instructions and new instructions implementing computational patterns on a reconfigurable cell fabric. All instructions are scheduled enabling parallel instruction execution. Our method can be used directly for VLIW architectures by relaxing constraints concerning cell-processor data transfers. MediaBench and MiBench benchmarks have been used for evaluation and we obtained optimal results in many cases.}},
author = {{Floch, Antoine and Wolinski, Christophe and Kuchcinski, Krzysztof}},
booktitle = {{21st IEEE International Conference on Application-specific Systems Architectures and Processors (ASAP), 2010}},
isbn = {{978-1-4244-6966-6}},
issn = {{2160-0511}},
language = {{eng}},
pages = {{167--174}},
publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
title = {{Combined scheduling and instruction selection for processors with reconfigurable cell fabric}},
url = {{http://dx.doi.org/10.1109/ASAP.2010.5540997}},
doi = {{10.1109/ASAP.2010.5540997}},
year = {{2010}},
}