Transactional memory (special issue introduction)
(2010) In Journal of Parallel and Distributed Computing 70(10). p.993-1008- Abstract
- Current and future processor generations are based on multicore architectures where the performance increase comes from an increasing number of cores on a chip. In order to utilize the performance potential of multicore architectures the programs also need to be parallel, but writing parallel programs is a non-trivial task. Transactional memory tries to ease parallel program development by providing atomic and isolated execution of code sequences, enabling software composability and protected access to shared data. In addition, transactional memory has the ability to execute atomic code sequences in parallel as long as no data conflicts occur. Transactional memory implementation proposals exist for both hardware and software, as well as... (More)
- Current and future processor generations are based on multicore architectures where the performance increase comes from an increasing number of cores on a chip. In order to utilize the performance potential of multicore architectures the programs also need to be parallel, but writing parallel programs is a non-trivial task. Transactional memory tries to ease parallel program development by providing atomic and isolated execution of code sequences, enabling software composability and protected access to shared data. In addition, transactional memory has the ability to execute atomic code sequences in parallel as long as no data conflicts occur. Transactional memory implementation proposals exist for both hardware and software, as well as hybrid solutions. This special issue on transactional memory introduces transactional memory as a concept, presents an overview of some of the most important approaches so far, and finally, includes five articles that advances the state-of-the-art in transactional memory research. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1684892
- author
- Grahn, Håkan
- publishing date
- 2010
- type
- Contribution to journal
- publication status
- published
- subject
- keywords
- Concurrency, Parallel programming, Multiprocessors, Transactions, Synchronization
- in
- Journal of Parallel and Distributed Computing
- volume
- 70
- issue
- 10
- pages
- 993 - 1008
- publisher
- Elsevier
- external identifiers
-
- scopus:77956063740
- ISSN
- 0743-7315
- DOI
- 10.1016/j.jpdc.2010.06.006
- project
- Embedded Applications Software Engineering
- language
- English
- LU publication?
- no
- id
- a8ccd80f-c347-4886-a3ca-cef266abf123 (old id 1684892)
- date added to LUP
- 2016-04-04 11:45:13
- date last changed
- 2022-04-16 03:59:00
@article{a8ccd80f-c347-4886-a3ca-cef266abf123,
abstract = {{Current and future processor generations are based on multicore architectures where the performance increase comes from an increasing number of cores on a chip. In order to utilize the performance potential of multicore architectures the programs also need to be parallel, but writing parallel programs is a non-trivial task. Transactional memory tries to ease parallel program development by providing atomic and isolated execution of code sequences, enabling software composability and protected access to shared data. In addition, transactional memory has the ability to execute atomic code sequences in parallel as long as no data conflicts occur. Transactional memory implementation proposals exist for both hardware and software, as well as hybrid solutions. This special issue on transactional memory introduces transactional memory as a concept, presents an overview of some of the most important approaches so far, and finally, includes five articles that advances the state-of-the-art in transactional memory research.}},
author = {{Grahn, Håkan}},
issn = {{0743-7315}},
keywords = {{Concurrency; Parallel programming; Multiprocessors; Transactions; Synchronization}},
language = {{eng}},
number = {{10}},
pages = {{993--1008}},
publisher = {{Elsevier}},
series = {{Journal of Parallel and Distributed Computing}},
title = {{Transactional memory (special issue introduction)}},
url = {{http://dx.doi.org/10.1016/j.jpdc.2010.06.006}},
doi = {{10.1016/j.jpdc.2010.06.006}},
volume = {{70}},
year = {{2010}},
}