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A Digitally Controlled Low-Power Clock Multiplier for Globally Asynchronous Locally Synchronous Designs

Olsson, Thomas LU ; Nilsson, Peter LU ; Meincke, Thomas; Hemani, Ahmed and Torkelson, Mats LU (2000) IEEE International Symposium on Circuits and Systems (ISCAS), 2000 In The 2000 IEEE International Symposium on Circuits and Systems. Proceedings. 3. p.13-16
Abstract
Partitioning large high-speed globally synchronous ASICs into locally clocked blocks reduces clock skew problems and if handled correctly it also reduces the power consumption. However, to achieve these positive effects, the blocks need on-chip clock generators having properties such as small area and low power consumption. Therefore, a low power, high frequency, small area digitally controlled on-chip clock generator is designed and fabricated using a 0.35 μm process. The clock generator delivers up to 1.15 GHz at 3.3 V supply voltage. At 1 V supply voltage, it delivers up to 92 MHz while consuming 0.16 mW
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
low-power electronics, application specific integrated circuits, clocks, pulse generators, multiplying circuits
in
The 2000 IEEE International Symposium on Circuits and Systems. Proceedings.
volume
3
pages
13 - 16
conference name
IEEE International Symposium on Circuits and Systems (ISCAS), 2000
external identifiers
  • Scopus:0033699240
ISBN
0-7803-5482-6
language
English
LU publication?
yes
id
a53e0bc0-5ba2-4656-9a63-c320f2f243c1 (old id 1034065)
date added to LUP
2008-02-21 10:15:23
date last changed
2016-10-13 04:57:31
@misc{a53e0bc0-5ba2-4656-9a63-c320f2f243c1,
  abstract     = {Partitioning large high-speed globally synchronous ASICs into locally clocked blocks reduces clock skew problems and if handled correctly it also reduces the power consumption. However, to achieve these positive effects, the blocks need on-chip clock generators having properties such as small area and low power consumption. Therefore, a low power, high frequency, small area digitally controlled on-chip clock generator is designed and fabricated using a 0.35 μm process. The clock generator delivers up to 1.15 GHz at 3.3 V supply voltage. At 1 V supply voltage, it delivers up to 92 MHz while consuming 0.16 mW},
  author       = {Olsson, Thomas and Nilsson, Peter and Meincke, Thomas and Hemani, Ahmed and Torkelson, Mats},
  isbn         = {0-7803-5482-6},
  keyword      = {low-power electronics,application specific integrated circuits,clocks,pulse generators,multiplying circuits},
  language     = {eng},
  pages        = {13--16},
  series       = {The 2000 IEEE International Symposium on Circuits and Systems. Proceedings.},
  title        = {A Digitally Controlled Low-Power Clock Multiplier for Globally Asynchronous Locally Synchronous Designs},
  volume       = {3},
  year         = {2000},
}