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Silicon realization of an OFDM synchronization algorithm

Johansson, Stefan; Landström, Daniel LU and Nilsson, Peter LU (1999) IEEE 6th International Conference on Electronics, Circuits and Systems (ICECS’99) In The 6th IEEE International Conference on Electronics, Circuits and Systems, Proceedings of ICECS '99. 1. p.319-322
Abstract
n this paper a hardware architecture for an OFDM synchronizer is presented. The proposed synchronization unit can be used in any OFDM system that uses a cyclic prefix. The algorithm is based on the correlation introduced by the cyclic prefix, which is exploited in the time domain where both time and frequency offset are estimated simultaneously. The synchronization unit also performs frequency correction, which means that no feedback to the analog parts is necessary. Although the algorithm is too complex to be implemented on today's most powerful standard DSP, a hardware architecture that is optimized for the algorithm can be implemented with moderate complexity. The unit contains 32 kbit RAM and 5000 gates and the sample rate is 25... (More)
n this paper a hardware architecture for an OFDM synchronizer is presented. The proposed synchronization unit can be used in any OFDM system that uses a cyclic prefix. The algorithm is based on the correlation introduced by the cyclic prefix, which is exploited in the time domain where both time and frequency offset are estimated simultaneously. The synchronization unit also performs frequency correction, which means that no feedback to the analog parts is necessary. Although the algorithm is too complex to be implemented on today's most powerful standard DSP, a hardware architecture that is optimized for the algorithm can be implemented with moderate complexity. The unit contains 32 kbit RAM and 5000 gates and the sample rate is 25 Msamples/s (Less)
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author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
in
The 6th IEEE International Conference on Electronics, Circuits and Systems, Proceedings of ICECS '99.
volume
1
pages
319 - 322
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
conference name
IEEE 6th International Conference on Electronics, Circuits and Systems (ICECS’99)
ISBN
0-7803-5682-9
DOI
10.1109/ICECS.1999.812287
language
English
LU publication?
yes
id
97b5173b-ec77-42c8-9ba8-20cc7aaead6d (old id 1034069)
date added to LUP
2008-02-27 09:16:49
date last changed
2016-04-16 10:10:21
@misc{97b5173b-ec77-42c8-9ba8-20cc7aaead6d,
  abstract     = {n this paper a hardware architecture for an OFDM synchronizer is presented. The proposed synchronization unit can be used in any OFDM system that uses a cyclic prefix. The algorithm is based on the correlation introduced by the cyclic prefix, which is exploited in the time domain where both time and frequency offset are estimated simultaneously. The synchronization unit also performs frequency correction, which means that no feedback to the analog parts is necessary. Although the algorithm is too complex to be implemented on today's most powerful standard DSP, a hardware architecture that is optimized for the algorithm can be implemented with moderate complexity. The unit contains 32 kbit RAM and 5000 gates and the sample rate is 25 Msamples/s},
  author       = {Johansson, Stefan and Landström, Daniel and Nilsson, Peter},
  isbn         = {0-7803-5682-9},
  language     = {eng},
  pages        = {319--322},
  publisher    = {ARRAY(0x96c8538)},
  series       = {The 6th IEEE International Conference on Electronics, Circuits and Systems, Proceedings of ICECS '99.},
  title        = {Silicon realization of an OFDM synchronization algorithm},
  url          = {http://dx.doi.org/10.1109/ICECS.1999.812287},
  volume       = {1},
  year         = {1999},
}