Advanced

Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style

Hemani, Ahmed; Meincke, Thomas; Postula, Adam; Olsson, Thomas LU ; Nilsson, Peter LU ; Öberg, Johnny; Ellervee, Peeter and Lindqvist, Dan (1999) 36th Design Automation Conference (DAC’99) In Proceedings of the 36th ACM/IEEE conference on Design automation p.873-878
Abstract
Power consumption in clock of large high performance

VLSIs can be reduced by adopting Globally Asynchronous,

Locally Synchronous design style (GALS). GALS

has small overheads for the global asynchronous communication

and local clock generation. We propose

methods to a) evaluate the benefits of GALS and account

for its overheads, which can be used as the basis

for partitioning the system into optimal number/size of

synchronous blocks, and b) automate the synthesis of

the global asynchronous communication. Three realistic

ASICs, ranging in complexity from 1 to 3 million

gates, were used to evaluate GALS benefits and overheads.

The... (More)
Power consumption in clock of large high performance

VLSIs can be reduced by adopting Globally Asynchronous,

Locally Synchronous design style (GALS). GALS

has small overheads for the global asynchronous communication

and local clock generation. We propose

methods to a) evaluate the benefits of GALS and account

for its overheads, which can be used as the basis

for partitioning the system into optimal number/size of

synchronous blocks, and b) automate the synthesis of

the global asynchronous communication. Three realistic

ASICs, ranging in complexity from 1 to 3 million

gates, were used to evaluate GALS benefits and overheads.

The results show an average power saving of

about 70% in clock with negligible overheads. (Less)
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
in
Proceedings of the 36th ACM/IEEE conference on Design automation
pages
873 - 878
conference name
36th Design Automation Conference (DAC’99)
external identifiers
  • Scopus:0032690091
ISBN
1-58133-109-7
DOI
10.1145/309847.310091
language
English
LU publication?
yes
id
96f24886-12de-4435-a56b-a0f598b9b319 (old id 1034102)
date added to LUP
2008-02-27 09:50:53
date last changed
2016-10-13 04:54:01
@misc{96f24886-12de-4435-a56b-a0f598b9b319,
  abstract     = {Power consumption in clock of large high performance<br/><br>
VLSIs can be reduced by adopting Globally Asynchronous,<br/><br>
Locally Synchronous design style (GALS). GALS<br/><br>
has small overheads for the global asynchronous communication<br/><br>
and local clock generation. We propose<br/><br>
methods to a) evaluate the benefits of GALS and account<br/><br>
for its overheads, which can be used as the basis<br/><br>
for partitioning the system into optimal number/size of<br/><br>
synchronous blocks, and b) automate the synthesis of<br/><br>
the global asynchronous communication. Three realistic<br/><br>
ASICs, ranging in complexity from 1 to 3 million<br/><br>
gates, were used to evaluate GALS benefits and overheads.<br/><br>
The results show an average power saving of<br/><br>
about 70% in clock with negligible overheads.},
  author       = {Hemani, Ahmed and Meincke, Thomas and Postula, Adam and Olsson, Thomas and Nilsson, Peter and Öberg, Johnny and Ellervee, Peeter and Lindqvist, Dan},
  isbn         = {1-58133-109-7},
  language     = {eng},
  pages        = {873--878},
  series       = {Proceedings of the 36th ACM/IEEE conference on Design automation},
  title        = {Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style},
  url          = {http://dx.doi.org/10.1145/309847.310091},
  year         = {1999},
}