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A 1.8 GHz CMOS VCO with reduced phase noise

Andreani, Pietro LU and Sjöland, Henrik LU (2001) In 2001 Symposium on VLSI Circuits, 2001. Digest of Technical Papers. p.121-122
Abstract
A 2 V, 6 mA, 15% tuning range, 1.8 GHz VCO implemented in a standard 0.35 μm CMOS process is presented. The phase noise of the VCO has been greatly reduced by means of on-chip filters and one off-chip low frequency inductor. The phase noise measured at 3 MHz offset from the carrier is between -141.5 dBc/Hz and -138.5 dBc/Hz over the whole tuning range
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
in
2001 Symposium on VLSI Circuits, 2001. Digest of Technical Papers.
pages
121 - 122
external identifiers
  • Scopus:0034794350
ISBN
4-89114-014-3
DOI
10.1109/VLSIC.2001.934213
language
English
LU publication?
yes
id
7a99bfd9-3753-43b5-96be-425e96929b05 (old id 1051456)
alternative location
http://ieeexplore.ieee.org/iel5/7437/20220/00934213.pdf
date added to LUP
2008-04-03 11:43:24
date last changed
2016-10-13 05:04:03
@misc{7a99bfd9-3753-43b5-96be-425e96929b05,
  abstract     = {A 2 V, 6 mA, 15% tuning range, 1.8 GHz VCO implemented in a standard 0.35 μm CMOS process is presented. The phase noise of the VCO has been greatly reduced by means of on-chip filters and one off-chip low frequency inductor. The phase noise measured at 3 MHz offset from the carrier is between -141.5 dBc/Hz and -138.5 dBc/Hz over the whole tuning range},
  author       = {Andreani, Pietro and Sjöland, Henrik},
  isbn         = {4-89114-014-3},
  language     = {eng},
  pages        = {121--122},
  series       = {2001 Symposium on VLSI Circuits, 2001. Digest of Technical Papers.},
  title        = {A 1.8 GHz CMOS VCO with reduced phase noise},
  url          = {http://dx.doi.org/10.1109/VLSIC.2001.934213},
  year         = {2001},
}