Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures
Wolinski, Christophe ; Kuchcinski, Krzysztof LU
; Teich, Jürgen
and Hannig, Frank
(2008)
11th Euromicro conference on Digital System Design (DSD)
p.345-352
- Abstract
- In this paper, we introduce a constraint programming-based approach for optimization of routing and reconfiguration overhead for a class of reconfigurable processor array architectures called weakly programmable. For a given set of different algorithms the execution of which is supposed to be switched upon request at run-time, we provide static solutions for optimal routing of data between processors as well as for minimization of the routing area and the reconfiguration overhead when switching between the execution of these algorithms. In fact, applying the switching can be accomplished in just a few clock cycles. Our experiments confirm that our method can minimize routing overhead and reduce reconfiguration time significantly.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1151629
- author
- Wolinski, Christophe
; Kuchcinski, Krzysztof
LU
; Teich, Jürgen
and Hannig, Frank
- organization
- publishing date
- 2008
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.
- pages
- 8 pages
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- 11th Euromicro conference on Digital System Design (DSD)
- conference location
- Parma, Italy
- conference dates
- 2008-09-03 - 2008-09-05
- external identifiers
-
- scopus:57649239602
- ISBN
- 978-0-7695-3277-6
- DOI
- 10.1109/DSD.2008.1
- language
- English
- LU publication?
- yes
- id
- adaec57e-25b1-4bb5-b34c-b519f03c94db (old id 1151629)
- date added to LUP
- 2016-04-04 10:27:48
- date last changed
- 2022-01-29 20:20:46
@inproceedings{adaec57e-25b1-4bb5-b34c-b519f03c94db,
abstract = {{In this paper, we introduce a constraint programming-based approach for optimization of routing and reconfiguration overhead for a class of reconfigurable processor array architectures called weakly programmable. For a given set of different algorithms the execution of which is supposed to be switched upon request at run-time, we provide static solutions for optimal routing of data between processors as well as for minimization of the routing area and the reconfiguration overhead when switching between the execution of these algorithms. In fact, applying the switching can be accomplished in just a few clock cycles. Our experiments confirm that our method can minimize routing overhead and reduce reconfiguration time significantly.}},
author = {{Wolinski, Christophe and Kuchcinski, Krzysztof and Teich, Jürgen and Hannig, Frank}},
booktitle = {{11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.}},
isbn = {{978-0-7695-3277-6}},
language = {{eng}},
pages = {{345--352}},
publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
title = {{Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures}},
url = {{http://dx.doi.org/10.1109/DSD.2008.1}},
doi = {{10.1109/DSD.2008.1}},
year = {{2008}},
}