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Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise

Mazzanti, Andrea and Andreani, Pietro LU (2008) In IEEE Journal of Solid-State Circuits 43(12). p.2716-2729
Abstract
A harmonic oscillator topology displaying an improved

phase noise performance is introduced in this paper.

Exploiting the advantages yielded by operating the core transistors

in class-C, a theoretical 3.9 dB phase noise improvement

compared to the standard differential-pair LC-tank oscillator

is achieved for the same current consumption. Further benefits

derive from the natural rejection of the tail bias current noise,

and from the absence of parasitic nodes sensitive to stray capacitances.

Closed-form phase-noise equations obtained from a

rigorous time-variant circuit analysis are presented, as well as a

time-variant study of the stability of the... (More)
A harmonic oscillator topology displaying an improved

phase noise performance is introduced in this paper.

Exploiting the advantages yielded by operating the core transistors

in class-C, a theoretical 3.9 dB phase noise improvement

compared to the standard differential-pair LC-tank oscillator

is achieved for the same current consumption. Further benefits

derive from the natural rejection of the tail bias current noise,

and from the absence of parasitic nodes sensitive to stray capacitances.

Closed-form phase-noise equations obtained from a

rigorous time-variant circuit analysis are presented, as well as a

time-variant study of the stability of the oscillation amplitude,

resulting in simple guidelines for a reliable design. Furthermore,

the analysis of phase noise is extended to encompass a general harmonic

oscillator, showing that all phase noise relations previously

obtained for specific LC oscillator topologies are special cases of a

very general and remarkably simple result.

Two prototypes of the (voltage-controlled) oscillator are

implemented in a standard RF 0.13 m CMOS technology.

They are tunable over the frequency bands 4.90-5.65 GHz and

4.50–5.00 GHz, respectively, and display an average phase noise

lower than 130 dBc/Hz @ 3 MHz from the carrier with a power

consumption of 1.4 mW, for a state-of-the-art figure-of-merit

ranging from 193.5 dBc/Hz to 196.0 dBc/Hz. (Less)
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Contribution to journal
publication status
published
subject
in
IEEE Journal of Solid-State Circuits
volume
43
issue
12
pages
2716 - 2729
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • WOS:000261801800013
  • Scopus:57849094654
ISSN
0018-9200
DOI
10.1109/JSSC.2008.2004867
language
English
LU publication?
yes
id
137b96f0-ad34-4deb-9a10-523e18038d29 (old id 1275159)
date added to LUP
2008-12-22 11:10:01
date last changed
2016-12-04 04:39:20
@misc{137b96f0-ad34-4deb-9a10-523e18038d29,
  abstract     = {A harmonic oscillator topology displaying an improved<br/><br>
phase noise performance is introduced in this paper.<br/><br>
Exploiting the advantages yielded by operating the core transistors<br/><br>
in class-C, a theoretical 3.9 dB phase noise improvement<br/><br>
compared to the standard differential-pair LC-tank oscillator<br/><br>
is achieved for the same current consumption. Further benefits<br/><br>
derive from the natural rejection of the tail bias current noise,<br/><br>
and from the absence of parasitic nodes sensitive to stray capacitances.<br/><br>
Closed-form phase-noise equations obtained from a<br/><br>
rigorous time-variant circuit analysis are presented, as well as a<br/><br>
time-variant study of the stability of the oscillation amplitude,<br/><br>
resulting in simple guidelines for a reliable design. Furthermore,<br/><br>
the analysis of phase noise is extended to encompass a general harmonic<br/><br>
oscillator, showing that all phase noise relations previously<br/><br>
obtained for specific LC oscillator topologies are special cases of a<br/><br>
very general and remarkably simple result.<br/><br>
Two prototypes of the (voltage-controlled) oscillator are<br/><br>
implemented in a standard RF 0.13 m CMOS technology.<br/><br>
They are tunable over the frequency bands 4.90-5.65 GHz and<br/><br>
4.50–5.00 GHz, respectively, and display an average phase noise<br/><br>
lower than 130 dBc/Hz @ 3 MHz from the carrier with a power<br/><br>
consumption of 1.4 mW, for a state-of-the-art figure-of-merit<br/><br>
ranging from 193.5 dBc/Hz to 196.0 dBc/Hz.},
  author       = {Mazzanti, Andrea and Andreani, Pietro},
  issn         = {0018-9200},
  language     = {eng},
  number       = {12},
  pages        = {2716--2729},
  publisher    = {ARRAY(0x7ac7708)},
  series       = {IEEE Journal of Solid-State Circuits},
  title        = {Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise},
  url          = {http://dx.doi.org/10.1109/JSSC.2008.2004867},
  volume       = {43},
  year         = {2008},
}