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A 90nm CMOS Gated-Ring-Oscillator-Based Vernier Time-to-Digital Converter with Improved Resolution

Lu, Ping LU ; Andreani, Pietro LU and Liscidini, Antonio (2011) IEEE European Solid State Circuits Conference, ESSCIRC 2011 In [Host publication title missing] p.459-462
Abstract
Two gated ring oscillators (GRO) act as the delay lines in an improved Vernier time-to-digital converter (TDC). The already small quantization noise of the standard Vernier TDC is further first-order shaped by the GRO operation. The TDC has been implemented in a 90nm CMOS technology and achieves a resolution better than 5ps for a signal bandwidth of 800kHz. The current consumption is 3mA from 1.2V when operating at 25MHz.
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
Time-to-Digital Converter, Gated Ring Oscillator, Vernier Delay Line
in
[Host publication title missing]
pages
459 - 462
conference name
IEEE European Solid State Circuits Conference, ESSCIRC 2011
external identifiers
  • Scopus:82955213931
ISSN
1930-8833
ISBN
978-1-4577-0703-2
DOI
10.1109/ESSCIRC.2011.6045006
language
English
LU publication?
yes
id
9fc6a540-1c5c-4f82-8ff8-40ca517babbc (old id 2437163)
date added to LUP
2012-04-04 14:44:51
date last changed
2016-10-13 04:24:21
@misc{9fc6a540-1c5c-4f82-8ff8-40ca517babbc,
  abstract     = {Two gated ring oscillators (GRO) act as the delay lines in an improved Vernier time-to-digital converter (TDC). The already small quantization noise of the standard Vernier TDC is further first-order shaped by the GRO operation. The TDC has been implemented in a 90nm CMOS technology and achieves a resolution better than 5ps for a signal bandwidth of 800kHz. The current consumption is 3mA from 1.2V when operating at 25MHz.},
  author       = {Lu, Ping and Andreani, Pietro and Liscidini, Antonio},
  isbn         = {978-1-4577-0703-2},
  issn         = {1930-8833},
  keyword      = {Time-to-Digital Converter,Gated Ring Oscillator,Vernier Delay Line},
  language     = {eng},
  pages        = {459--462},
  series       = {[Host publication title missing]},
  title        = {A 90nm CMOS Gated-Ring-Oscillator-Based Vernier Time-to-Digital Converter with Improved Resolution},
  url          = {http://dx.doi.org/10.1109/ESSCIRC.2011.6045006},
  year         = {2011},
}