Advanced

A 103fsrms 1.32mW 50MS/s 1.25MHz Bandwidth Two-Step Flash-ΔΣ Time-to-Digital Converter for ADPLL

Wu, Ying; Lu, Ping LU and Staszewski, Robert Bogdan (2015) IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2015 In [Host publication title missing]
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
in press
subject
in
[Host publication title missing]
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
conference name
IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2015
language
English
LU publication?
yes
id
1555f350-6496-471f-98f9-ebab25f1bc9f (old id 5101356)
date added to LUP
2015-02-24 12:22:41
date last changed
2016-04-16 10:19:11
@misc{1555f350-6496-471f-98f9-ebab25f1bc9f,
  author       = {Wu, Ying and Lu, Ping and Staszewski, Robert Bogdan},
  language     = {eng},
  publisher    = {ARRAY(0x89b7f68)},
  series       = {[Host publication title missing]},
  title        = {A 103fsrms 1.32mW 50MS/s 1.25MHz Bandwidth Two-Step Flash-ΔΣ Time-to-Digital Converter for ADPLL},
  year         = {2015},
}