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Using Jitterbug to Derive Control Loop Timing Requirements

Cervin, Anton LU (2003) In Proceedings of CERTS'03 – Co-Design of Embedded Real-Time Systems Workshop
Abstract
Linking scheduling attributes to control performance specifications is a difficult problem. This paper discusses how the MATLAB toolbox Jitterbug can be used to derive timing requirements for control loops from various control performance specifications. The resulting timing requirements include specifications on sampling periods, latencies, and jitter. An overview of the Jitterbug approach is given, and limitations of the tool are pointed out. A control design example is given, and, finally, topics where more research is needed are outlined.
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Chapter in Book/Report/Conference proceeding
publication status
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Proceedings of CERTS'03 – Co-Design of Embedded Real-Time Systems Workshop
language
English
LU publication?
yes
id
17fdd166-634d-4883-bf47-e152daf278c1 (old id 536801)
date added to LUP
2007-09-13 13:35:46
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2016-04-16 10:37:11
@misc{17fdd166-634d-4883-bf47-e152daf278c1,
  abstract     = {Linking scheduling attributes to control performance specifications is a difficult problem. This paper discusses how the MATLAB toolbox Jitterbug can be used to derive timing requirements for control loops from various control performance specifications. The resulting timing requirements include specifications on sampling periods, latencies, and jitter. An overview of the Jitterbug approach is given, and limitations of the tool are pointed out. A control design example is given, and, finally, topics where more research is needed are outlined.},
  author       = {Cervin, Anton},
  language     = {eng},
  series       = {Proceedings of CERTS'03 – Co-Design of Embedded Real-Time Systems Workshop},
  title        = {Using Jitterbug to Derive Control Loop Timing Requirements},
  year         = {2003},
}