Advanced

DTMROC-S: Deep submicron version of the readout chip for the TRT detector in ATLAS

Anghinolfi, Francisco; Åkesson, Torsten LU ; Eerola, Paula LU ; Farthouat, Philippe; Lichard, Peter; Ryjov, Vladimir; Szczygiel, Richard; Dressnandt, Nandor; Keener, Paul and Newcomer, Mitch, et al. (2002) 8th Workshop On Electronics For LHC Experiments In 8th Workshop On Electronics For LHC Experiments p.95-99
Abstract
A new version of the circuit for the readout of the ATLAS straw tube detector, TRT [1], has been developed in a deep-submicron process. The DTMROC-S is fabricated in a commercial 0.25μm CMOS IBM technology, with a library hardened by layout techniques [2]. Compared to the previous version of the chip [3] done in a 0.8μm radiation-hard CMOS and despite of the features added for improving the robustness and testability of the circuit, the deep-submicron technology results in a much smaller chip size that increases the production yield and lowers the power consumption.
Please use this url to cite or link to this publication:
author
, et al. (More)
(Less)
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
ATLAS TRT deep-submicron electronics
in
8th Workshop On Electronics For LHC Experiments
pages
5 pages
publisher
Colmar 2002, Electronics for LHC experiments
conference name
8th Workshop On Electronics For LHC Experiments
project
ATLAS
language
English
LU publication?
yes
id
abca0c5d-ca61-404d-981b-7cf1f6a08082 (old id 958792)
date added to LUP
2008-01-25 16:40:50
date last changed
2016-04-16 07:32:57
@misc{abca0c5d-ca61-404d-981b-7cf1f6a08082,
  abstract     = {A new version of the circuit for the readout of the ATLAS straw tube detector, TRT [1], has been developed in a deep-submicron process. The DTMROC-S is fabricated in a commercial 0.25μm CMOS IBM technology, with a library hardened by layout techniques [2]. Compared to the previous version of the chip [3] done in a 0.8μm radiation-hard CMOS and despite of the features added for improving the robustness and testability of the circuit, the deep-submicron technology results in a much smaller chip size that increases the production yield and lowers the power consumption.},
  author       = {Anghinolfi, Francisco and Åkesson, Torsten and Eerola, Paula and Farthouat, Philippe and Lichard, Peter and Ryjov, Vladimir and Szczygiel, Richard and Dressnandt, Nandor and Keener, Paul and Newcomer, Mitch and Van Berg, Rick and Williams, Hugh},
  keyword      = {ATLAS TRT deep-submicron electronics},
  language     = {eng},
  pages        = {95--99},
  publisher    = {ARRAY(0xc544ca8)},
  series       = {8th Workshop On Electronics For LHC Experiments},
  title        = {DTMROC-S: Deep submicron version of the readout chip for the TRT detector in ATLAS},
  year         = {2002},
}