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Vertical III-V nanowire device integration on Si(100)

Borg, Mattias LU ; Schmid, Heinz; Moselund, Kirsten E.; Signorello, Giorgio; Gignac, Lynne; Bruley, John; Breslin, Chris; Das Kanungo, Pratyush; Werner, Peter and Riel, Heike (2014) In Nano Letters 14(4). p.1914-1920
Abstract

We report complementary metal-oxide-semiconductor (CMOS)-compatible integration of compound semiconductors on Si substrates. InAs and GaAs nanowires are selectively grown in vertical SiO2 nanotube templates fabricated on Si substrates of varying crystallographic orientations, including nanocrystalline Si. The nanowires investigated are epitaxially grown, single-crystalline, free from threading dislocations, and with an orientation and dimension directly given by the shape of the template. GaAs nanowires exhibit stable photoluminescence at room temperature, with a higher measured intensity when still surrounded by the template. Si-InAs heterojunction nanowire tunnel diodes were fabricated on Si(100) and are electrically... (More)

We report complementary metal-oxide-semiconductor (CMOS)-compatible integration of compound semiconductors on Si substrates. InAs and GaAs nanowires are selectively grown in vertical SiO2 nanotube templates fabricated on Si substrates of varying crystallographic orientations, including nanocrystalline Si. The nanowires investigated are epitaxially grown, single-crystalline, free from threading dislocations, and with an orientation and dimension directly given by the shape of the template. GaAs nanowires exhibit stable photoluminescence at room temperature, with a higher measured intensity when still surrounded by the template. Si-InAs heterojunction nanowire tunnel diodes were fabricated on Si(100) and are electrically characterized. The results indicate a high uniformity and scalability in the fabrication process. © 2014 American Chemical Society.

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Please use this url to cite or link to this publication:
author
publishing date
type
Contribution to journal
publication status
published
subject
keywords
GaAs, III-V semiconductors, InAs, integration, Nanowires, Si
in
Nano Letters
volume
14
issue
4
pages
7 pages
publisher
The American Chemical Society
external identifiers
  • Scopus:84898017227
ISSN
1530-6984
DOI
10.1021/nl404743j
language
English
LU publication?
no
id
a488f09e-4ede-444b-8169-391e1dcc8295
date added to LUP
2016-04-20 10:32:18
date last changed
2016-11-20 04:32:45
@misc{a488f09e-4ede-444b-8169-391e1dcc8295,
  abstract     = {<p>We report complementary metal-oxide-semiconductor (CMOS)-compatible integration of compound semiconductors on Si substrates. InAs and GaAs nanowires are selectively grown in vertical SiO<sub>2</sub> nanotube templates fabricated on Si substrates of varying crystallographic orientations, including nanocrystalline Si. The nanowires investigated are epitaxially grown, single-crystalline, free from threading dislocations, and with an orientation and dimension directly given by the shape of the template. GaAs nanowires exhibit stable photoluminescence at room temperature, with a higher measured intensity when still surrounded by the template. Si-InAs heterojunction nanowire tunnel diodes were fabricated on Si(100) and are electrically characterized. The results indicate a high uniformity and scalability in the fabrication process. © 2014 American Chemical Society.</p>},
  author       = {Borg, Mattias and Schmid, Heinz and Moselund, Kirsten E. and Signorello, Giorgio and Gignac, Lynne and Bruley, John and Breslin, Chris and Das Kanungo, Pratyush and Werner, Peter and Riel, Heike},
  issn         = {1530-6984},
  keyword      = {GaAs,III-V semiconductors,InAs,integration,Nanowires,Si},
  language     = {eng},
  month        = {04},
  number       = {4},
  pages        = {1914--1920},
  publisher    = {ARRAY(0x55edef0)},
  series       = {Nano Letters},
  title        = {Vertical III-V nanowire device integration on Si(100)},
  url          = {http://dx.doi.org/10.1021/nl404743j},
  volume       = {14},
  year         = {2014},
}