Digital ASIC-lup-obsolete
31 – 40 of 192
- show: 10
- |
- sort: year (new to old)
Close
Embed this list
<iframe src=" "
width=" "
height=" "
allowtransparency="true"
frameborder="0">
</iframe>
- 2014
-
Mark
Test Planning and Test Access Mechanism Design for 3D SICs
2014) Swedish System on Chip Conference (SSoCC), 2014(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Supply-Voltage Down Conversion for Digital CMOS Designs
2014) IEEE 21th International Conference on Electronics, Circuits and Systems, 2014(
- Contribution to conference › Paper, not in proceeding
-
Mark
Implementation of a dynamic wordlength SIMD multiplier
(
- Contribution to conference › Paper, not in proceeding
-
Mark
Hardware Implementation of the Exponential Function Using Taylor Series
2014) 32nd NORCHIP Conference, 2014(
- Contribution to conference › Paper, not in proceeding
-
Mark
Dynamically Reconfigurable Architectures for Real-time Baseband Processing
2014)(
- Thesis › Doctoral thesis (monograph)
-
Mark
Test Planning and Test Access Mechanism Design for Stacked Chips using ILP
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2013
-
Mark
Faster-Than-Nyquist Signaling
(
- Contribution to journal › Article
-
Mark
Embedded DfT Instrumentation: Design, Access, Retargeting and Case Studies
2013) VLSI Test Symposium (VTS)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Design Space Exploration of Digital Circuits for Ultra-low Energy Dissipation
2013)(
- Thesis › Doctoral thesis (monograph)
-
Mark
Generalized lock-in amplifier for precision measurement of high frequency signals
(
- Contribution to journal › Article