Martin Andersson (Former)
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- 2009
-
Mark
DT Modeling of Clock Phase Noise Effects in LP CT Delta-Sigma ADCs with RZ Feedback
(
- Contribution to journal › Article
-
Mark
Design and measurement of a CT delta-sigma ADC with switched-capacitor switched-resistor feedback
(
- Contribution to journal › Article
-
Mark
Swedish system-on-chip conference focuses on meter to nanometer scale electronics R&D
(
- Contribution to specialist publication or newspaper › Newspaper article
- 2008
-
Mark
CMOS Analog-to-Digital Converters - Analysis, Modeling, and Design
2008)(
- Thesis › Doctoral thesis (compilation)
- 2007
-
Mark
Teaching Top Down Design of Analog/Mixed Signal ICs Through Design Projects
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
IC-Project and Verification Course: Teaching Top Down Analog/Mixed Signal Design
2007) Swedish System-on-Chip Conference 2007 (SSoCC’07)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2005
-
Mark
A Reconfigurable Pipelined ADC in 0.18 um CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Studies of time error limitations in ADC systems with random parallel passive sampling
2005) Swedish System-on-Chip Conference (SSoCC'05)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2004
-
Mark
A novel reconfigurable pipelined A/D conversion technique for multistandard wideband receivers
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2003
-
Mark
Verification of a blind mismatch error equalization method for randomly interleaved ADCs using a 2.5V/12b/30MSs PSAADC
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding