A low-complexity method for distributed clocking on digital ASICs - Olsson, Thomas; Nilsson, Peter (Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, Fukuoka, Japan, 2004-08-04 - 2004-08-05, 2004)
A low-complexity method using synchronous wrappers is proposed to simplify communication between modules using unsynchronized clocks. To test the method, it is implemented together with a divider and an FFT co-processor. The divider with synchronous wrapper and local clock generator, delivering a 500 MHz clock, is synthesized and verified using post-synthesis simulations for a 0.18 μm 1.8 V CMOS technology. A complete description of the wrapper in synthesizable VHDL-code including local a local clock generator makes the method portable between technologies
Keywords: local clock generator; divider; FFT coprocessor; unsynchronized clocks; digital ASIC; synchronous wrappers; distributed clocking; low-complexity method; CMOS technology; post-synthesis simulation; VHDL-code; large SoC; 1.8 V