1 – 5 of 12
- show: 5
- |
- sort: year (new to old)
Close
Embed this list
<iframe src=" "
width=" "
height=" "
allowtransparency="true"
frameborder="0">
</iframe>
- 2021
-
Mark
An ultra-low power high-precision logarithmic-curvature compensated all-CMOS voltage reference in 65 nm CMOS
(
- Contribution to journal › Article
-
Mark
Power Scaling Laws for Radio Receiver Front Ends
(
- Contribution to journal › Article
-
Mark
High-density logic-in-memory devices using vertical indium arsenide nanowires on silicon
(
- Contribution to journal › Article
- 2020
-
Mark
Design of an area efficient crypto processor for 3GPP-LTE NB-IoT devices
(
- Contribution to journal › Article
- 2019
-
Mark
A 10-mW mm-Wave Phase-Locked Loop With Improved Lock Time in 28-nm FD-SOI CMOS
(
- Contribution to journal › Article