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- 2024
-
Mark
Fast Prototyping of Massive MIMO User Equipment Using PYNQ
(
- Master (Two yrs)
- 2023
-
Mark
Embedded ECU dual CPU Emulator
(
- Master (Two yrs)
-
Mark
Digital Front End Algorithms for Sub-Band Full Duplex
(
- Master (Two yrs)
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Mark
Antenna Arrays for Dual-Frequency Harmonic Radar Application
(
- Master (Two yrs)
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Mark
Beam-steered Modulation in Advanced Antenna System
(
- Master (Two yrs)
-
Mark
Machine Learning-based MIMO Indoor Positioning
(
- Master (Two yrs)
-
Mark
Design and Modeling of InxGa(1−x)As/InP based Nanosheet Field Effect Transistors for High Frequency Applications
(
- Master (Two yrs)
-
Mark
Memory Efficient Hardware Accelerator for CNN Inference
(
- Master (Two yrs)
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Mark
Ray-tracing Based Investigations on the Deployment of RISs in Indoor Scenarios
(
- Master (Two yrs)
-
Mark
Detection of Abnormalities in Cardiac Rhythm Using Spiking Neural Networks
(
- Master (Two yrs)
-
Mark
Real-time remote processing enabled by high speed Ethernet
(
- Master (Two yrs)
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Mark
Investigation of Analog Calibration Systems for Spurious Tone Suppression in Frequency Triplers
(
- Master (Two yrs)
-
Mark
Design of a 13-Bit SAR ADC with kT/C noise cancellation technique
(
- Master (Two yrs)
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Mark
Evaluation and Optimization of LTE-V2X Mode 4 under Aperiodic Messages of Variable Size
(
- Master (Two yrs)
-
Mark
Hardware Accelerator of Bundle Adjustment Algorithm
(
- Master (Two yrs)
-
Mark
Near Field millimeter Wave Antenna Measurements
(
- Master (Two yrs)
-
Mark
Simulation and Testing of a MU-MIMO Beamforming System
(
- Master (Two yrs)
-
Mark
Privacy threat analysis and evaluation of Privacy Enhancing Technologies for the integration of 3D Scene Graphs in smart buildings
(
- Master (Two yrs)
-
Mark
Evaluation of Ferroelectric Tunnel Junction memristor for in-memory computation in real world use cases
(
- Master (Two yrs)
-
Mark
A General Purpose Near Data Processing Architecture Optimized for Data-intensive Applications
(
- Master (Two yrs)
-
Mark
Using Approximate Computing Circuits to Optimize Power of an ASIC
(
- Master (Two yrs)
-
Mark
E-Band Transmitter Design 71G - 86GHz
(
- Master (Two yrs)
-
Mark
Novel Method of ASIC interface IP development using HLS
(
- Master (Two yrs)
-
Mark
Towards More Efficient Wireless Power Transfer for 6G
(
- Master (Two yrs)
-
Mark
Design and evaluation of architectures for efficient generation of control sequences
(
- Master (Two yrs)
- 2022
-
Mark
Investigating and Modeling Uplink Processing in 5G NR Multisector Scheduler Simulator
(
- Master (Two yrs)
-
Mark
Antenna Design and Link Performance Verification of Antennas for 5G mmWave Handheld Devices
(
- Master (Two yrs)
-
Mark
Importance Sampling in Wireless Communication Systems with Ultra-Low Error Rates
(
- Master (Two yrs)
-
Mark
Investigating Machine Learning for verification of AMBA APB protocol.
(
- Master (Two yrs)
-
Mark
Efficient High-level Synthesis Implementation of massive MIMO Processing on RFSoC
(
- Master (Two yrs)
-
Mark
Exploiting Spatial Redundancy and Approximate Computing for Area Efficient Image Compression
(
- Master (Two yrs)
-
Mark
FPGA Implementation of the ORB Algorithm
(
- Master (Two yrs)
-
Mark
Beamformed Channel Matrix Positioning using 5G Testbench CSI data with a Deep-Learning Pipeline
(
- Master (Two yrs)
-
Mark
Backscatter Communications for 6G
(
- Master (Two yrs)
-
Mark
Hybrid Wireless Data Transfer In A Medical Sensor Node
(
- Master (One yr)
-
Mark
Faster than Nyquist Signaling with Spatial Coupling
(
- Master (Two yrs)
-
Mark
Hybrid Wireless Positioning
(
- Master (Two yrs)
-
Mark
Configurable, scalable single-ended sense amplifier with additional auxiliary blocks for low-power two-port memories in advanced FinFET technologies
(
- Master (Two yrs)
-
Mark
Testing Platform for Memory IPs using PULPissimo
(
- Master (Two yrs)
-
Mark
An Approximate Near Data Processing Accelerator for a CNN in a RISC-V Platform
(
- Master (Two yrs)
-
Mark
Investigation on 5G Techniques for a College Scenario
(
- Master (Two yrs)
-
Mark
E-Band SPDT RF Switch for a Class F PA in III-V Nanowire MOSFET Technology
(
- Master (Two yrs)
-
Mark
Performance evaluation and modeling of a beam-simulation system for MIMO communications
(
- Master (Two yrs)
- 2021
-
Mark
Study of Monitoring Circuitry for Ageing in FPGAs
(
- Master (Two yrs)
-
Mark
Chemical Mechanical Polishing of InSb
(
- Master (Two yrs)
-
Mark
A Study on Efficient Memory Utilization in Machine Learning and Memory Intensive Systems
(
- Master (Two yrs)
-
Mark
On-chip Instrument Access Through System Hierarchy
(
- Master (Two yrs)
-
Mark
Evaluation of Discrete-Time Wideband Receivers for NB-IoT
(
- Master (Two yrs)
-
Mark
Design parameterizable filter using High Level Synthesis
(
- Master (Two yrs)
-
Mark
Automated Layout Porting and Optimization of digital designs
(
- Master (Two yrs)