Exploiting Spatial Redundancy and Approximate Computing for Area Efficient Image Compression
(2022) EITM02 20201Department of Electrical and Information Technology
- Abstract
- Owing to the intensive computation involved in the Discrete Cosine Transform during image com- pression, the design of the efficient hardware architectures for fast computation of the transform has become imperative, especially for real-time applications. Although fast computation techniques have been able to minimise the hardware computation complexity to a certain limit, they could further extend the research to figure out the interesting approaches which can be implemented on applications where power, speed and area are crucial factors to determine the performance of the system.
This thesis work is an attempt towards implementing a novel approach to provide image com- pression with low area and power requirement . Various reduced... (More) - Owing to the intensive computation involved in the Discrete Cosine Transform during image com- pression, the design of the efficient hardware architectures for fast computation of the transform has become imperative, especially for real-time applications. Although fast computation techniques have been able to minimise the hardware computation complexity to a certain limit, they could further extend the research to figure out the interesting approaches which can be implemented on applications where power, speed and area are crucial factors to determine the performance of the system.
This thesis work is an attempt towards implementing a novel approach to provide image com- pression with low area and power requirement . Various reduced computational compression algo- rithms were proposed by exploiting hardware efficient image compression algorithms. Furthermore, to understand and compare their performances, the concepts of spatial redundancy and approxi- mate computing in images are exploited. The work designs a number of hardware efficient image compression algorithms.
In this thesis work, the models try to group the pixel data by taking the image’s feature space similarity and spatial coherence characteristics into consideration. These models have been tested successfully on a wide range of images, including black and white images and coloured images. The proposed architectures in this paper bring forth equal or higher image performance with higher compression ratio with less hardware requirement. These architectures are also compared among each other to provide an understanding on design-space exploration. (Less) - Popular Abstract
- Despite the advances in semiconductor technologies and the development of energy-efficient design techniques, the overall energy consumption of computer systems is still growing at an alarming rate in order to process an ever-increasing amount of information. It is essential to dramatically improve the energy efficiency for these emerging workloads to keep up with the growth of information.
Approximate computing [1][2] or inexact computing trades off computation quality with the effort expended. As rising performance demands confronting with plateauing resource budgets, ap- proximate computing has become not merely attractive, but even imperative. It is one of the ways which is gaining popularity for applications where accuracy is not... (More) - Despite the advances in semiconductor technologies and the development of energy-efficient design techniques, the overall energy consumption of computer systems is still growing at an alarming rate in order to process an ever-increasing amount of information. It is essential to dramatically improve the energy efficiency for these emerging workloads to keep up with the growth of information.
Approximate computing [1][2] or inexact computing trades off computation quality with the effort expended. As rising performance demands confronting with plateauing resource budgets, ap- proximate computing has become not merely attractive, but even imperative. It is one of the ways which is gaining popularity for applications where accuracy is not very important. By compro- mising on accuracy, engineers can achieve better power/energy, performance or area efficiency for such applications. Researchers have applied inexact computing techniques at an algorithmic level as well as at a circuit-level to improve the power, performance and area numbers. Many authors have also described imprecise adders for low-power approximate computing applications including image processing [3].
Image compression is a process of reducing the size of the representation of the graphics file in binary format without affecting the quality of the image to an objectionable level. This reduction helps to store more images for the same amount of storage device. It also decreases the transmission time for the images to be sent over the various technologies like internet [4]. The discrete cosine transform (DCT) which is the most widely used technique for image compression was initially de- fined in [4]. The DCT can be used to convert the signal (spatial information) into numeric data ("frequency" or "spectral" information) so that the image’s information exists in a quantitative form that can be manipulated for compression. (Less)
Please use this url to cite or link to this publication:
http://lup.lub.lu.se/student-papers/record/9074485
- author
- Arjun, Saurav LU
- supervisor
- organization
- course
- EITM02 20201
- year
- 2022
- type
- H2 - Master's Degree (Two Years)
- subject
- keywords
- Image Compression, VLSI, Spatial redundancy, DCT, Compression, System Verilog
- report number
- LU/LTH-EIT 2022-856
- language
- English
- id
- 9074485
- date added to LUP
- 2022-02-10 10:24:50
- date last changed
- 2022-02-10 10:24:50
@misc{9074485,
abstract = {{Owing to the intensive computation involved in the Discrete Cosine Transform during image com- pression, the design of the efficient hardware architectures for fast computation of the transform has become imperative, especially for real-time applications. Although fast computation techniques have been able to minimise the hardware computation complexity to a certain limit, they could further extend the research to figure out the interesting approaches which can be implemented on applications where power, speed and area are crucial factors to determine the performance of the system.
This thesis work is an attempt towards implementing a novel approach to provide image com- pression with low area and power requirement . Various reduced computational compression algo- rithms were proposed by exploiting hardware efficient image compression algorithms. Furthermore, to understand and compare their performances, the concepts of spatial redundancy and approxi- mate computing in images are exploited. The work designs a number of hardware efficient image compression algorithms.
In this thesis work, the models try to group the pixel data by taking the image’s feature space similarity and spatial coherence characteristics into consideration. These models have been tested successfully on a wide range of images, including black and white images and coloured images. The proposed architectures in this paper bring forth equal or higher image performance with higher compression ratio with less hardware requirement. These architectures are also compared among each other to provide an understanding on design-space exploration.}},
author = {{Arjun, Saurav}},
language = {{eng}},
note = {{Student Paper}},
title = {{Exploiting Spatial Redundancy and Approximate Computing for Area Efficient Image Compression}},
year = {{2022}},
}