Evaluating Power Saving Strategies in the Downlink Subsystem of Radio ASICs
(2025) EITM01 20251Department of Electrical and Information Technology
- Abstract
- Modern telecommunications equipment places increasing demands on energy efficiency, driven by both environmental concerns, rising electricity costs, and the strain on national power grids. This thesis investigates practical ways to reduce power consumption in radios, particularly in the downlink digital signal processing chain. Our findings were tested on two platforms, a validation board and an integrated \gls{aas} radio. It evaluates different power savings techniques such as binary offset, reducing filter order, automatic clock gating, and reorganizing filter branches to save power. Our results show that reducing filter order lowered power consumption nearly linearly with the number of coefficients, although the Sample Rate Converter... (More)
- Modern telecommunications equipment places increasing demands on energy efficiency, driven by both environmental concerns, rising electricity costs, and the strain on national power grids. This thesis investigates practical ways to reduce power consumption in radios, particularly in the downlink digital signal processing chain. Our findings were tested on two platforms, a validation board and an integrated \gls{aas} radio. It evaluates different power savings techniques such as binary offset, reducing filter order, automatic clock gating, and reorganizing filter branches to save power. Our results show that reducing filter order lowered power consumption nearly linearly with the number of coefficients, although the Sample Rate Converter showed unexpected nonlinear behavior. Applying binary offset reduced power consumption for lower-amplitude signals by up to 10 percent, but was less effective at higher signal strength and could even increase power. Enabling automatic clock gating with zeroed data reduced power consumption by an additional 5 percentage points compared to the baseline. This effect was also confirmed on the \gls{aas} radio. In contrast, an alternative branch selection scheme did not improve efficiency and slightly increased power consumption consumption.
These findings demonstrate that there is scope to reduce power consumption in the examined digital signal processing ASIC. However, the techniques must be evaluated for their impact on signal quality before adoption in real-world systems. Future work could extend this by exploring strategies such as dynamic filter order, binary offset in the uplink filter chain, and power gating. (Less) - Popular Abstract
- Modern society depends on fast and reliable mobile communication. Every time we stream a video, send a message, or make a call, our devices connect to a vast network of radio units and data centers. But all of this connectivity comes at a cost: energy. Telecommunications equipment accounts for more than one percent of the world's electricity use. With 5G becoming widely adopted and with 6G on the horizon, demand for higher speeds and more data grows every year, creating a conflict with climate commitments and increasing electricity costs. The question then becomes: how can we keep up with performance demands without draining more power?
Mobile base stations contain specialized chips called ASICs (Application-Specific Integrated... (More) - Modern society depends on fast and reliable mobile communication. Every time we stream a video, send a message, or make a call, our devices connect to a vast network of radio units and data centers. But all of this connectivity comes at a cost: energy. Telecommunications equipment accounts for more than one percent of the world's electricity use. With 5G becoming widely adopted and with 6G on the horizon, demand for higher speeds and more data grows every year, creating a conflict with climate commitments and increasing electricity costs. The question then becomes: how can we keep up with performance demands without draining more power?
Mobile base stations contain specialized chips called ASICs (Application-Specific Integrated Circuits). Unlike the processor in a laptop, which is designed for general workloads, these circuits are optimized for one purpose only: processing radio data. This makes them fast and efficient, but with millions in use across telecom networks, even small inefficiencies add up to large amounts of electricity use. Reducing the power consumption of these ASICs is therefore a key step in lowering the overall energy footprint of mobile networks.
To keep things practical, we ran the experiments on real radio hardware. First on a validation board where we could isolate each change, and then if possible we tested it on a live antenna radio to confirm the results in a realistic setting. This let us check both power savings and system impact. We looked at four different strategies for saving energy during downlink, when a base station transmits to devices. One was automatic clock gating, which allows parts of the chip to "sleep" when not in use. Another was reducing the size of the digital filters, which reduces the amount of math the chip has to do. A third method, called binary offset, involved changing the way signals are represented so that fewer unnecessary operations occur. Finally, we tested rearranging which filters were in use to see if an alternate grouping could cut overhead.
Our experiments showed that not all strategies worked equally well. Automatic clock gating reduced energy use when there were no signals to process and it had a demonstrable effect on the live radio. Reducing filter size and applying binary offset also lowered power consumption, but each came with trade-offs. Smaller filters distorted the signal too much, while binary offset only helped in specific cases when the signal strength was low. Finally, rearranging filters achieved the opposite of our goals and increased power use.
Taken together, these results highlight both the potential and the challenges of making radio hardware greener. Looking ahead, future work could build on our techniques, such as dynamically changing the filter size based on the signal being sent or turning off more parts of the radio during sleep through power gating. With millions of radios operating nonstop worldwide, even small gains per chip can add up to a major cut in energy use. (Less)
Please use this url to cite or link to this publication:
http://lup.lub.lu.se/student-papers/record/9213291
- author
- Cedervall, Alexander LU and Bergmark, Viktor LU
- supervisor
- organization
- course
- EITM01 20251
- year
- 2025
- type
- H2 - Master's Degree (Two Years)
- subject
- keywords
- Power Consumption, Radio ASIC, Power Save
- report number
- LU/LTH-EIT 2025-1094
- language
- English
- id
- 9213291
- date added to LUP
- 2025-10-01 15:15:15
- date last changed
- 2025-10-01 15:15:15
@misc{9213291,
abstract = {{Modern telecommunications equipment places increasing demands on energy efficiency, driven by both environmental concerns, rising electricity costs, and the strain on national power grids. This thesis investigates practical ways to reduce power consumption in radios, particularly in the downlink digital signal processing chain. Our findings were tested on two platforms, a validation board and an integrated \gls{aas} radio. It evaluates different power savings techniques such as binary offset, reducing filter order, automatic clock gating, and reorganizing filter branches to save power. Our results show that reducing filter order lowered power consumption nearly linearly with the number of coefficients, although the Sample Rate Converter showed unexpected nonlinear behavior. Applying binary offset reduced power consumption for lower-amplitude signals by up to 10 percent, but was less effective at higher signal strength and could even increase power. Enabling automatic clock gating with zeroed data reduced power consumption by an additional 5 percentage points compared to the baseline. This effect was also confirmed on the \gls{aas} radio. In contrast, an alternative branch selection scheme did not improve efficiency and slightly increased power consumption consumption.
These findings demonstrate that there is scope to reduce power consumption in the examined digital signal processing ASIC. However, the techniques must be evaluated for their impact on signal quality before adoption in real-world systems. Future work could extend this by exploring strategies such as dynamic filter order, binary offset in the uplink filter chain, and power gating.}},
author = {{Cedervall, Alexander and Bergmark, Viktor}},
language = {{eng}},
note = {{Student Paper}},
title = {{Evaluating Power Saving Strategies in the Downlink Subsystem of Radio ASICs}},
year = {{2025}},
}