Department of Electrical and Information Technology
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- 2016
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Mark
Modeling and Implementation of A 6-Bit, 50MHz Pipelined ADC in CMOS
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- Master (Two yrs)
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The Design and Linearization of 60GHz Injection Locked Power Amplifier
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- Master (Two yrs)
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Studies of vacuum discharges in the CLIC accelerating structure
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- Master (Two yrs)
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Compact Object Security for the Internet of Things
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- Master (Two yrs)
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Mark
Performance Evaluation of GPRS and Fiber as Transmission Medium for Social Care Systems
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- Master (Two yrs)
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Mark
Efficient IPv6 Neighbor Discovery in Wireless Environment
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- Master (Two yrs)
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Mark
Implementing Linear Predictive Coding based on a statistical model for LTE fronthaul
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- Master (Two yrs)
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Prototype Implementation of a 5G Group-Based Authentication and Key Agreement Protocol
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- Master (Two yrs)
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Design of a Memory Compiler
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- Master (Two yrs)
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Mark
Effect of active load on III-V NWFET Double-Balanced Gilbert Cells
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- Master (Two yrs)