Department of Electrical and Information Technology
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- 2025
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Mark
Converging SPI_S Designs: An Evaluation of Configurable IP Development
- Master (Two yrs)
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Comparative Study on CORDIC Accelerators for NCO Applications
- Master (Two yrs)
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Design of a Kolmogorov-Arnold Network Hardware Accelerator
- Master (Two yrs)
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Mark
Automatic Memory Allocation/Deallocation in Hardware
- Master (Two yrs)
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Mark
Real-Time Audio Processing on FPGA for Microphone Arrays
- Master (Two yrs)
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Mark
Portable Stimulus for ASIC Verification
- Master (Two yrs)
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Mark
Retro-reflective Antenna Design for ISAC
- Master (Two yrs)
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Designing low-power hardware for high-precision cellular localization using attention-based machine learning algorithms
- Master (Two yrs)
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Exploring Formal in Datapath Verification
- Master (Two yrs)
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Evaluating Power Saving Strategies in the Downlink Subsystem of Radio ASICs
- Master (Two yrs)