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Hall Measurement on Regrown Nanowires

Sivakumar, Sudhakar LU (2015) FYSM60 20151
Department of Physics
Abstract
Ternary semiconductor alloys like $In_xGa_{1-x}As$ have lured competing attention in connection to sub-50 nm high performance, low power, planar Complementary Metal Oxide Semiconductor technology. This compound semiconductor owes its popularity to excellent bulk carrier mobility, minority carrier diffusion constant, small bandgap, high electron injection velocity and its capability to take Moore's law beyond silicon platform. Though they exhibit exceptional properties in their bulk, their properties in confined architectures like a nanowire (NW) still remains relatively less explored. In this work, the transport properties of $In_xGa_{1-x}As$ is explored in a planar confined device architecture, by performing \textbf{Hall Measurements} on... (More)
Ternary semiconductor alloys like $In_xGa_{1-x}As$ have lured competing attention in connection to sub-50 nm high performance, low power, planar Complementary Metal Oxide Semiconductor technology. This compound semiconductor owes its popularity to excellent bulk carrier mobility, minority carrier diffusion constant, small bandgap, high electron injection velocity and its capability to take Moore's law beyond silicon platform. Though they exhibit exceptional properties in their bulk, their properties in confined architectures like a nanowire (NW) still remains relatively less explored. In this work, the transport properties of $In_xGa_{1-x}As$ is explored in a planar confined device architecture, by performing \textbf{Hall Measurements} on $In_xGa_{1-x}As$ NWs, in a home built measurement setup. The device of interest is fabricated with the help of Electron Beam Lithography (EBL) and a novel method of \textbf{selective area regrowth}. The pattern is made with the help of Hydrogen Silesquixone (HSQ) negative tone E-beam resist on a semi-insulating InP substrate. The device geometry allows placement of probe electrodes exactly opposite to each other, which is very important to extract Hall voltage and hence the mobility of the NW. Ti/Pd and Au bilayer is used to make the contact pads which are again defined by EBL with PMMA positive E-beam resist. The samples were mounted on an insulating ceramic holder and each device was manually wire bonded to the contact pins using a 0.25 \textmu m gauge aluminium wire. And Hall measurements were performed on the successful devices at room temperature. For the proposed geometry, the devices exhibited electron mobility values $ \approx (5000 \pm 800)$ cm$^2$/Vs. (Less)
Popular Abstract
Co-founder of Intel Corp, Gordon Moore made a very famous observation in 1965 about shrinking integrated circuits. During that time, portable computers and other handheld devices were yet to be common place objects. Computers consumed lot of power and consequently produced lot of heat. They were also very expensive, mainly due to the cost involved in making them. Moore’s prediction which is popularly called ‘Moore’s Law’, made a statement which predicted that the semiconductor industries will squeeze twice as many transistors on a silicon chip in 10 years. This meant faster computers for same or lower cost. Later in 1975, the time span of the prediction was updated to 2 years.
Now, major semiconductor industries are shrinking the... (More)
Co-founder of Intel Corp, Gordon Moore made a very famous observation in 1965 about shrinking integrated circuits. During that time, portable computers and other handheld devices were yet to be common place objects. Computers consumed lot of power and consequently produced lot of heat. They were also very expensive, mainly due to the cost involved in making them. Moore’s prediction which is popularly called ‘Moore’s Law’, made a statement which predicted that the semiconductor industries will squeeze twice as many transistors on a silicon chip in 10 years. This meant faster computers for same or lower cost. Later in 1975, the time span of the prediction was updated to 2 years.
Now, major semiconductor industries are shrinking the transistor size and cost every two years, to make computers and other wireless devices faster and affordable than ever. But, this trend won’t continue forever. We can’t shrink the size of the transistor beyond certain node. This will cripple the semiconductor industry and they won’t be able to satisfy out ever growing huger for computing power. To deliver what is expected from them, they have started looking for alternative, innovative ideas to increase computing speed and reduce cost. And my work is to about developing such innovative ideas.
Silicon chips no longer offer space to squeeze more transistors, it is time for us to move to other semiconductors like Indium Gallium Arsenide(InGaAs). Electrons move much faster in InGaAs than in normal silicon transistors. It is an established fact that the electrons move faster in InGaAs, in their bulk. But, transistor sizes have already reduced down to billionth of a meter in 2013. In order to make relevant innovation, one should properly understand how InGaAs will act in such dimensions. But, there are very few reports about that.
In my work, I have developed a special manufacturing process, which will allow one to fabricate InGaAs in the form of a nanowire. The nanowires were only 50 nm in their width and 2 – 3 μm in their length. In order to analyze how fast electrons travel in the nanowire, hall measurements should be performed on them. Hall Effect is commonly used in semiconductors to find how fast the charge carriers are travelling in them. In order to perform hall measurement on the nanowire, I have developed a special design which will make the measurement easier and accurate. Initially, there was lot of problems in realizing the design for such small dimensions. But after lot of optimization, I succeeded in realizing the design and performed hall measurements.
It was found that the electrons travel at a speed of ~5000 cm2/Vs in an InGaAs nanowire device. Though it was expected to be much higher, due to some current leakage the performance was poor. But, a reliable manufacturing process and a proper design was developed. In future, more accurate measurements can be made, so that we find alternative ways to shrink transistor size and cost. (Less)
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author
Sivakumar, Sudhakar LU
supervisor
organization
course
FYSM60 20151
year
type
H2 - Master's Degree (Two Years)
subject
keywords
Hall measurement, InGaAs, III-V semiconductor, ballistic, transport properties, mobility, sheet carrier concentration
language
English
id
8058001
date added to LUP
2015-10-19 14:27:09
date last changed
2015-10-19 14:27:09
@misc{8058001,
  abstract     = {Ternary semiconductor alloys like $In_xGa_{1-x}As$ have lured competing attention in connection to sub-50 nm high performance, low power, planar Complementary Metal Oxide Semiconductor technology. This compound semiconductor owes its popularity to excellent bulk carrier mobility, minority carrier diffusion constant, small bandgap, high electron injection velocity and its capability to take Moore's law beyond silicon platform. Though they exhibit exceptional properties in their bulk, their properties in confined architectures like a nanowire (NW) still remains relatively less explored. In this work, the transport properties of $In_xGa_{1-x}As$ is explored in a planar confined device architecture, by performing \textbf{Hall Measurements} on $In_xGa_{1-x}As$ NWs, in a home built measurement setup. The device of interest is fabricated with the help of Electron Beam Lithography (EBL) and a novel method of \textbf{selective area regrowth}. The pattern is made with the help of Hydrogen Silesquixone (HSQ) negative tone E-beam resist on a semi-insulating InP substrate. The device geometry allows placement of probe electrodes exactly opposite to each other, which is very important to extract Hall voltage and hence the mobility of the NW. Ti/Pd and Au bilayer is used to make the contact pads which are again defined by EBL with PMMA positive E-beam resist. The samples were mounted on an insulating ceramic holder and each device was manually wire bonded to the contact pins using a 0.25 \textmu m gauge aluminium wire. And Hall measurements were performed on the successful devices at room temperature. For the proposed geometry, the devices exhibited electron mobility values $ \approx (5000 \pm 800)$ cm$^2$/Vs.},
  author       = {Sivakumar, Sudhakar},
  keyword      = {Hall measurement,InGaAs,III-V semiconductor,ballistic,transport properties,mobility,sheet carrier concentration},
  language     = {eng},
  note         = {Student Paper},
  title        = {Hall Measurement on Regrown Nanowires},
  year         = {2015},
}