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Modeling and Implementation of A 6-Bit, 50MHz Pipelined ADC in CMOS

Farooq, Qazi Omar LU (2016) EITM01 20122
Department of Electrical and Information Technology
Abstract
The pipelined ADC is a popular Nyquist-rate data converter due to its attractive feature of maintaining high accuracy at high conversion rate with low complexity and power consumption. The rapid growth of its application such as mobile system, digital video and high speed data acquisition is driving the pipelined ADC design towards higher speed, higher precision with lower supply voltage and power consumption. This thesis project aims at modeling and implementation of a pipelined ADC with high speed and low power consumption.
Please use this url to cite or link to this publication:
author
Farooq, Qazi Omar LU
supervisor
organization
course
EITM01 20122
year
type
H2 - Master's Degree (Two Years)
subject
report number
LU/LHT-EIT 2016-549
language
English
id
8894621
date added to LUP
2016-11-16 11:38:43
date last changed
2016-11-16 11:38:43
@misc{8894621,
  abstract     = {The pipelined ADC is a popular Nyquist-rate data converter due to its attractive feature of maintaining high accuracy at high conversion rate with low complexity and power consumption. The rapid growth of its application such as mobile system, digital video and high speed data acquisition is driving the pipelined ADC design towards higher speed, higher precision with lower supply voltage and power consumption. This thesis project aims at modeling and implementation of a pipelined ADC with high speed and low power consumption.},
  author       = {Farooq, Qazi Omar},
  language     = {eng},
  note         = {Student Paper},
  title        = {Modeling and Implementation of A 6-Bit, 50MHz Pipelined ADC in CMOS},
  year         = {2016},
}