Evaluation of flexible SPA based LPDC decoder using hardware friendly approximation methods
(2017) EITM02 20171Department of Electrical and Information Technology
 Abstract
 Due to computationintensive nature of LDPC decoders, a lot of research is going
towards eﬃcient implementation of their original algorithm (SPA). As "MinSum"
approximation is basically an overestimation of SPA, this thesis investigates more
accurate, yet area eﬃcient, approximations of SPA, to select an optimum one. In a
general comparison between main approximation methods (e.g. LUT, PWL, CRI),
PWL showed the most areaeﬃciency. Studying diﬀerent mathematical formats of
SPA, SoftXOR based format with forwardbackward scheme was chosen for hard
ware implementation. Its core function (SoftXOR) was implemented with CRI
approximation, which achieved the highest eﬃciency, compare to other approxi
mations. Using this core... (More)  Due to computationintensive nature of LDPC decoders, a lot of research is going
towards eﬃcient implementation of their original algorithm (SPA). As "MinSum"
approximation is basically an overestimation of SPA, this thesis investigates more
accurate, yet area eﬃcient, approximations of SPA, to select an optimum one. In a
general comparison between main approximation methods (e.g. LUT, PWL, CRI),
PWL showed the most areaeﬃciency. Studying diﬀerent mathematical formats of
SPA, SoftXOR based format with forwardbackward scheme was chosen for hard
ware implementation. Its core function (SoftXOR) was implemented with CRI
approximation, which achieved the highest eﬃciency, compare to other approxi
mations. Using this core function, a ﬂexible, pipelined, SoftXOR based CNU
(the computational unit of LDPC decoders) with forwardbackward architecture
was developed in 18nm CMOS. The implemented CNU’s area and speed can eas
ily be changed in instantiation. A SPA decoder based on the developed CNU was
estimated to have an area of 1.6M as equivalent gate count and a throughput of
10Gb/s, with a frequency of 1.25GHz and for 10 iterations. The decoder uses
IEEE 802.11n WiFi standard with ﬂooding schedule. The BER/SNR loss, com
pare to ﬂoatingpoint SPA, is 0.3dB for 10 iterations and less than 0.1dB for 20
iterations. (Less)  Popular Abstract
 You have to get lost before you can be found, a quote by Jeﬀ Rasley goes very well
for Low Density Parity Check (LDPC) codes. First invented by Gallager in 1962
but kind of lost during the journey of evolution of telecommunication networks
because of their high complexity and demanding computations, which technology
was not so advanced to handle, at that time. However, during late 1990s, success of
turbo codes invoked the rediscovery of Low Density Parity Check (LDPC) codes.
Recently it has attracted tremendous research interest among the scientiﬁc com
munity, as today’s technology is advanced enough and to make LDPC decoders
completely commercial. In a wireless network, the information is not just sim
ply sent, but ﬁrst... (More)  You have to get lost before you can be found, a quote by Jeﬀ Rasley goes very well
for Low Density Parity Check (LDPC) codes. First invented by Gallager in 1962
but kind of lost during the journey of evolution of telecommunication networks
because of their high complexity and demanding computations, which technology
was not so advanced to handle, at that time. However, during late 1990s, success of
turbo codes invoked the rediscovery of Low Density Parity Check (LDPC) codes.
Recently it has attracted tremendous research interest among the scientiﬁc com
munity, as today’s technology is advanced enough and to make LDPC decoders
completely commercial. In a wireless network, the information is not just sim
ply sent, but ﬁrst encoded. In a sense, all the transmitted bits are tied together,
according to some mathematical rules. Therefore, if noise destructs parts of the
information while traveling, the LDPC decoder at the receiver side, can automat
ically detect and retrieve those parts, based on the other parts. Here, our main
focus is on the decoder. For actual hardware implementation of the decoder, some
level of approximation of the ideal algorithm is always necessary, which reduces
the accuracy depending on the approximation.
Ericsson is developing the nextgeneration wireless network for 5G, and already
possesses the "MinSum" approximation of the LDPC decoder. As the current
requirements demand more accurate decoders, the goal of this thesis is to evalu
ate a more accurate but more costly version of the LDPC decoder, as well as its
ﬂexibility. Thus, several candidates were selected and evaluated based on their
complexity, cost, and their accuracy towards error correction. After performing
several tradeoﬀs, an approximation method is chosen and the corresponding cost
is derived. With this acquired data, a tradeoﬀ between accuracy and cost can be
made, depending on the application. (Less)
Please use this url to cite or link to this publication:
http://lup.lub.lu.se/studentpapers/record/8924109
 author
 Seraj, Afshin ^{LU} and Yadav, Deepak
 supervisor

 Liang Liu ^{LU}
 organization
 course
 EITM02 20171
 year
 2017
 type
 H2  Master's Degree (Two Years)
 subject
 keywords
 forwardbackward, SPA, softxor, sum product algorithm, approximation, decoder, LDPC
 report number
 LU/LTHEIT 2017600
 language
 English
 id
 8924109
 date added to LUP
 20170925 15:59:17
 date last changed
 20170925 15:59:17
@misc{8924109, abstract = {Due to computationintensive nature of LDPC decoders, a lot of research is going towards eﬃcient implementation of their original algorithm (SPA). As "MinSum" approximation is basically an overestimation of SPA, this thesis investigates more accurate, yet area eﬃcient, approximations of SPA, to select an optimum one. In a general comparison between main approximation methods (e.g. LUT, PWL, CRI), PWL showed the most areaeﬃciency. Studying diﬀerent mathematical formats of SPA, SoftXOR based format with forwardbackward scheme was chosen for hard ware implementation. Its core function (SoftXOR) was implemented with CRI approximation, which achieved the highest eﬃciency, compare to other approxi mations. Using this core function, a ﬂexible, pipelined, SoftXOR based CNU (the computational unit of LDPC decoders) with forwardbackward architecture was developed in 18nm CMOS. The implemented CNU’s area and speed can eas ily be changed in instantiation. A SPA decoder based on the developed CNU was estimated to have an area of 1.6M as equivalent gate count and a throughput of 10Gb/s, with a frequency of 1.25GHz and for 10 iterations. The decoder uses IEEE 802.11n WiFi standard with ﬂooding schedule. The BER/SNR loss, com pare to ﬂoatingpoint SPA, is 0.3dB for 10 iterations and less than 0.1dB for 20 iterations.}, author = {Seraj, Afshin and Yadav, Deepak}, keyword = {forwardbackward,SPA,softxor,sum product algorithm,approximation,decoder,LDPC}, language = {eng}, note = {Student Paper}, title = {Evaluation of flexible SPA based LPDC decoder using hardware friendly approximation methods}, year = {2017}, }