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Specification and Visualization of Interconnection Networks of Mobile GPUs

Wictorin, Björn LU (2017) In LU-CS-EX 2017-32 EDAM05 20172
Department of Computer Science
Abstract
The number of components that can be fit into a single chip is increasing over

time, because of improved manufacturing technology. An efficient way to con-
nect the components is through a packet switched network, a Network on Chip.

Such a network can be designed in many different ways. An effective way to

explore the large design space is by simulation. In this project, we have devel-
oped a network description language to define the network of a mobile GPU.

As part of this process, we have surveyed how NoCs are specified in several

simulators. We have implemented support for the language in a GPU simula-
tor. We have also implemented a script that outputs a visual representation of

networks defined in the language.
... (More)
The number of components that can be fit into a single chip is increasing over

time, because of improved manufacturing technology. An efficient way to con-
nect the components is through a packet switched network, a Network on Chip.

Such a network can be designed in many different ways. An effective way to

explore the large design space is by simulation. In this project, we have devel-
oped a network description language to define the network of a mobile GPU.

As part of this process, we have surveyed how NoCs are specified in several

simulators. We have implemented support for the language in a GPU simula-
tor. We have also implemented a script that outputs a visual representation of

networks defined in the language.
The purpose of the project has been to develop tools to make Network on
Chip modeling faster, easier, and less error prone. The result was evaluated
qualitatively and quantitatively. (Less)
Please use this url to cite or link to this publication:
author
Wictorin, Björn LU
supervisor
organization
course
EDAM05 20172
year
type
H3 - Professional qualifications (4 Years - )
subject
keywords
NoC, GPU, modeling, simulation, visualization
publication/series
LU-CS-EX 2017-32
report number
LU-CS-EX 2017-32
ISSN
1650-2884
language
English
id
8931726
date added to LUP
2018-01-09 17:34:20
date last changed
2018-01-09 17:34:20
@misc{8931726,
  abstract     = {The number of components that can be fit into a single chip is increasing over

time, because of improved manufacturing technology. An efficient way to con-
nect the components is through a packet switched network, a Network on Chip.

Such a network can be designed in many different ways. An effective way to

explore the large design space is by simulation. In this project, we have devel-
oped a network description language to define the network of a mobile GPU.

As part of this process, we have surveyed how NoCs are specified in several

simulators. We have implemented support for the language in a GPU simula-
tor. We have also implemented a script that outputs a visual representation of

networks defined in the language.
The purpose of the project has been to develop tools to make Network on
Chip modeling faster, easier, and less error prone. The result was evaluated
qualitatively and quantitatively.},
  author       = {Wictorin, Björn},
  issn         = {1650-2884},
  keyword      = {NoC,GPU,modeling,simulation,visualization},
  language     = {eng},
  note         = {Student Paper},
  series       = {LU-CS-EX 2017-32},
  title        = {Specification and Visualization of Interconnection Networks of Mobile GPUs},
  year         = {2017},
}