PLL for 5G mmWave
(2020) EITM02 20201Department of Electrical and Information Technology
- Abstract
- This paper presents research and implementation of a high frequency Integer-N phase-locked loop for digital beamforming in mobile devices. Multiple topologies investigated whereof two were implemented. The transient phase noise of the PLL is -104dB/-95dB @1MHz. The output frequency range is from 8G-10G. Reference signal is 163.84MHz, reference-spurs is -80dBc/-98dBc lower than main frequency. RMS jitter is about 38fs/68fs. Locking time is less than 3.5us. The implementation consists of an LC-tank VCO with extra tail filtering. Divider chain consisting of a dual module prescaler/CML prescaler followed by a programmable divider. Charge pump with compensation method and a cascoded gain-boosting charge pump is used to decrease current... (More)
- This paper presents research and implementation of a high frequency Integer-N phase-locked loop for digital beamforming in mobile devices. Multiple topologies investigated whereof two were implemented. The transient phase noise of the PLL is -104dB/-95dB @1MHz. The output frequency range is from 8G-10G. Reference signal is 163.84MHz, reference-spurs is -80dBc/-98dBc lower than main frequency. RMS jitter is about 38fs/68fs. Locking time is less than 3.5us. The implementation consists of an LC-tank VCO with extra tail filtering. Divider chain consisting of a dual module prescaler/CML prescaler followed by a programmable divider. Charge pump with compensation method and a cascoded gain-boosting charge pump is used to decrease current mismatch. Tri-state phase detector and lastly a third-order passive loop filter. Supply voltage at 0.8V is used in the design. Total power consumption is less than 10mW.
The PLL system was implemented in the CMOS FD-SOI 22nm process and simulations executed in the Virtuoso Cadence environment. Limitations and possible improvements are listed in the end. (Less) - Popular Abstract
- The upcoming 5G-New Radio Standard will enable cellular communication in the millimeter-Wave (mmWave) frequency bands,24-100GHz. These frequency bands will open up for large system bandwidth and tremendously high data rates enabling lots of new use cases, such as smart cities, connected cars, medical applications and much more! Given this cutting-edge technology, exciting challenges arises for today's RF designers that requires state-of-the-art solutions.
High isotropic path loss between radio transmitters and radio receivers makes it necessary to rely on antenna arrays with large number of antenna elements. MIMO stands for Multiple-Input-Multiple-Output. In reality this means using multiple antennas on the same frequency band, with... (More) - The upcoming 5G-New Radio Standard will enable cellular communication in the millimeter-Wave (mmWave) frequency bands,24-100GHz. These frequency bands will open up for large system bandwidth and tremendously high data rates enabling lots of new use cases, such as smart cities, connected cars, medical applications and much more! Given this cutting-edge technology, exciting challenges arises for today's RF designers that requires state-of-the-art solutions.
High isotropic path loss between radio transmitters and radio receivers makes it necessary to rely on antenna arrays with large number of antenna elements. MIMO stands for Multiple-Input-Multiple-Output. In reality this means using multiple antennas on the same frequency band, with massive indicating a high number of such antennas. Making these antennas directional through beamforming, focusing the transmission in the direction of the receiving party, may overcome the issues with isotropic path loss.
Traditionally mmWave has been used more for short-range communication due to its inherent characteristics and propagation loss, but in combination with MIMO and beamforming it will take the next generations of cellular communication to new levels!
Small antennas needed for mmWave open possibilities to integrate the RFIC, front end radio modules, filters, and antenna element in a singe RF chip. This fact, in combination with that 5G-NR is standardized for communication also over mmWave radio frequencies which enables mmWave communication in smartphone and IoT devices, will drastically change the way beamforming will be implemented in mobile devices in the future!
A critical component used in wireless communications that will be included in this type of integrated chip is the, so called, phase-locked loop (PLL). The PLL is a feedback system which can generate a periodic precise signal at a certain frequency and phase. This ability is quite useful and can be applied in various applications for frequency synthesis. Facing new challenges with mmWave applied with beamforming, the design of a phase-locked loop has become more challenging and requires state-of-the-art thinking to satisfy the needs of the industry.
In this Master's Thesis, we present the design process of a charge pump based phase-locked loop with 22nm technology. Each building block has been thoroughly examined to acquire enough knowledge to carry out our own designs. Multiple architectures were tested for each block until a satisfactory one was finally implemented. The entire system was then implemented using these blocks. Two finalized systems consisting of different architectures were designed and simulated, whereof both can be used in a 5G-NR mmWave application. (Less)
Please use this url to cite or link to this publication:
http://lup.lub.lu.se/student-papers/record/9017370
- author
- Bakic, Daniel LU and Wu, Jinzhuo
- supervisor
- organization
- course
- EITM02 20201
- year
- 2020
- type
- H2 - Master's Degree (Two Years)
- subject
- keywords
- PLL, 5G-NR, RFIC, beamforming, 22nm FDSOI, charge pump, vco, loop filter, frequency divider, phase detector, phase noise, jitter
- report number
- LU/LTH-EIT 2020-757
- language
- English
- id
- 9017370
- date added to LUP
- 2020-06-17 10:38:51
- date last changed
- 2020-06-17 10:38:51
@misc{9017370,
abstract = {{This paper presents research and implementation of a high frequency Integer-N phase-locked loop for digital beamforming in mobile devices. Multiple topologies investigated whereof two were implemented. The transient phase noise of the PLL is -104dB/-95dB @1MHz. The output frequency range is from 8G-10G. Reference signal is 163.84MHz, reference-spurs is -80dBc/-98dBc lower than main frequency. RMS jitter is about 38fs/68fs. Locking time is less than 3.5us. The implementation consists of an LC-tank VCO with extra tail filtering. Divider chain consisting of a dual module prescaler/CML prescaler followed by a programmable divider. Charge pump with compensation method and a cascoded gain-boosting charge pump is used to decrease current mismatch. Tri-state phase detector and lastly a third-order passive loop filter. Supply voltage at 0.8V is used in the design. Total power consumption is less than 10mW.
The PLL system was implemented in the CMOS FD-SOI 22nm process and simulations executed in the Virtuoso Cadence environment. Limitations and possible improvements are listed in the end.}},
author = {{Bakic, Daniel and Wu, Jinzhuo}},
language = {{eng}},
note = {{Student Paper}},
title = {{PLL for 5G mmWave}},
year = {{2020}},
}