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- 2020
-
Mark
Implementation of a Deep Learning Inference Accelerator on the FPGA.
(
- Master (Two yrs)
- 2019
-
Mark
Implementation of an 8-bit Dynamic Fixed-Point Convolutional Neural Network for Human Sign Language Recognition on a Xilinx FPGA Board
(
- Master (Two yrs)
- 2018
-
Mark
Electromagnetic analysis of AES-256 on Xilinx Artix-7
(
- Master (Two yrs)
- 2017
-
Mark
FPGA-BASED HYBRID COMPUTING FOR ESS LINAC SIMULATOR.
(
- Master (Two yrs)
-
Mark
Virtual Cycle-accurate Hardware and Software Co-simulation Platform for Cellular IoT
(
- Master (Two yrs)
- 2016
-
Mark
Software Defined Radio based MIMO channel sounding
(
- Master (Two yrs)
-
Mark
High speed backbone for FPGA at ESS
(
- Master (Two yrs)
- 2015
-
Mark
Acceleration of Pedestrian Detection System using Hardware-Software Co-design
(
- Master (Two yrs)
-
Mark
Acquisition of distributed CAN traffic for centralized analysis at functional and electrical levels
(
- Master (Two yrs)
-
Mark
Hardware Design of Real-Time Neural Signal Generator
(
- Master (Two yrs)
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