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Chip for wideband digital predistortion RF power amplifier linearisation

Andreani, Pietro LU and Sundström, Lars (1997) In Electronics Letters 33(11). p.925-926
Abstract
The authors present a custom chip for use in digital predistortion linearisation of RF power amplifiers. The chip is mainly implemented with systolic arrays. At maximum clock-rate, 130 MHz, the throughput is 16 Msamples/s with a 5 V supply voltage and power consumption of 1 W. A throughput of 2 Msamples/s is achieved at a 1.2 V supply voltage with 6 mW power consumption
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Contribution to journal
publication status
published
subject
in
Electronics Letters
volume
33
issue
11
pages
925 - 926
publisher
IEE
external identifiers
  • Scopus:0031146605
ISSN
1350-911X
language
English
LU publication?
yes
id
faa3083a-c8f2-4fdc-82e5-24fb46fb8af5 (old id 1050930)
alternative location
http://ieeexplore.ieee.org/iel5/2220/12947/00591527.pdf?tp=&isnumber=12947&arnumber=591527&punumber=2220
date added to LUP
2008-03-27 15:15:02
date last changed
2016-10-13 04:27:48
@misc{faa3083a-c8f2-4fdc-82e5-24fb46fb8af5,
  abstract     = {The authors present a custom chip for use in digital predistortion linearisation of RF power amplifiers. The chip is mainly implemented with systolic arrays. At maximum clock-rate, 130 MHz, the throughput is 16 Msamples/s with a 5 V supply voltage and power consumption of 1 W. A throughput of 2 Msamples/s is achieved at a 1.2 V supply voltage with 6 mW power consumption},
  author       = {Andreani, Pietro and Sundström, Lars},
  issn         = {1350-911X},
  language     = {eng},
  number       = {11},
  pages        = {925--926},
  publisher    = {ARRAY(0x8463cf8)},
  series       = {Electronics Letters},
  title        = {Chip for wideband digital predistortion RF power amplifier linearisation},
  volume       = {33},
  year         = {1997},
}