High-level design flow for all-digital PLLs
(2006) p.247-250- Abstract
- Deep-submicrometer CMOS processes are not suitable for traditional analog circuit design but they provide new opportunities of integrating complex digital functions. Within RF wireless communications, frequency synthesis stands out as a fundamental feature and novel digital solutions have been suggested for its implementation. Moving from an existing model, the goal of this paper is to outline the steps of a high-level approach to the design of an all-digital phase-locked loop (ADPLL)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1051019
- author
- Dondi, Silvia ; Strandberg, Roland ; Nilsson, Magnus ; Boni, Andrea and Andreani, Pietro LU
- publishing date
- 2006
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- 24th Norchip Conference, 2006.
- pages
- 247 - 250
- external identifiers
-
- scopus:34547271283
- ISBN
- 1-4244-0772-9
- DOI
- 10.1109/NORCHP.2006.329221
- language
- English
- LU publication?
- no
- id
- 223ffe3b-3a34-43e7-a7f5-525fbcdfa7c9 (old id 1051019)
- alternative location
- http://ieeexplore.ieee.org/iel5/4126933/4075696/04126992.pdf
- date added to LUP
- 2016-04-04 14:16:29
- date last changed
- 2022-01-30 01:44:53
@inproceedings{223ffe3b-3a34-43e7-a7f5-525fbcdfa7c9, abstract = {{Deep-submicrometer CMOS processes are not suitable for traditional analog circuit design but they provide new opportunities of integrating complex digital functions. Within RF wireless communications, frequency synthesis stands out as a fundamental feature and novel digital solutions have been suggested for its implementation. Moving from an existing model, the goal of this paper is to outline the steps of a high-level approach to the design of an all-digital phase-locked loop (ADPLL)}}, author = {{Dondi, Silvia and Strandberg, Roland and Nilsson, Magnus and Boni, Andrea and Andreani, Pietro}}, booktitle = {{24th Norchip Conference, 2006.}}, isbn = {{1-4244-0772-9}}, language = {{eng}}, pages = {{247--250}}, title = {{High-level design flow for all-digital PLLs}}, url = {{http://dx.doi.org/10.1109/NORCHP.2006.329221}}, doi = {{10.1109/NORCHP.2006.329221}}, year = {{2006}}, }