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Double-edge-triggered D-flip-flop for high speed CMOS circuits

Afgahi, Morteza and Yuan, Jiren LU (1991) In IEEE Journal of Solid-State Circuits 26(8). p.1168-1170
Abstract
Two circuits are proposed for double edge-triggered D flip-flops (DETDFFs). A DETDFF responds to both edges of the clock pulse. As compared with positive or negative edge-triggered flip-flops, a DETDFF has advantages in terms of power dissipation and speed. Delay figures for these circuits are measured by simulation. It is shown that these circuits are faster and have lower transistor counts than previously reported circuits. It is shown that these flip-flops can be used at 320-400-MHz clock frequency in a 2-μm technology.
Please use this url to cite or link to this publication:
author
publishing date
type
Contribution to journal
publication status
published
subject
in
IEEE Journal of Solid-State Circuits
volume
26
issue
8
pages
1168 - 1170
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • Scopus:0026207089
ISSN
0018-9200
DOI
10.1109/4.90071
language
English
LU publication?
no
id
c8aa25ff-7ffc-4e52-ab2b-101a68a2ff78 (old id 1758987)
date added to LUP
2011-01-04 18:13:35
date last changed
2016-10-13 04:32:04
@misc{c8aa25ff-7ffc-4e52-ab2b-101a68a2ff78,
  abstract     = {Two circuits are proposed for double edge-triggered D flip-flops (DETDFFs). A DETDFF responds to both edges of the clock pulse. As compared with positive or negative edge-triggered flip-flops, a DETDFF has advantages in terms of power dissipation and speed. Delay figures for these circuits are measured by simulation. It is shown that these circuits are faster and have lower transistor counts than previously reported circuits. It is shown that these flip-flops can be used at 320-400-MHz clock frequency in a 2-μm technology.},
  author       = {Afgahi, Morteza and Yuan, Jiren},
  issn         = {0018-9200},
  language     = {eng},
  number       = {8},
  pages        = {1168--1170},
  publisher    = {ARRAY(0xa199e00)},
  series       = {IEEE Journal of Solid-State Circuits},
  title        = {Double-edge-triggered D-flip-flop for high speed CMOS circuits},
  url          = {http://dx.doi.org/10.1109/4.90071},
  volume       = {26},
  year         = {1991},
}