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Capture Power Reduction for Modular System-on-Chip Test

Tudu, Jaynarayan T.; Larsson, Erik LU ; Singh, Virendra and Singh, Adit (2009) IEEE/VSI VLSI Design and Test Symposium (VDAT)
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author
publishing date
type
Contribution to conference
publication status
published
subject
conference name
IEEE/VSI VLSI Design and Test Symposium (VDAT)
language
English
LU publication?
no
id
0afffa44-0ab6-477e-a683-5876c4418d2b (old id 2340902)
date added to LUP
2012-02-10 13:50:16
date last changed
2016-06-29 09:07:47
@misc{0afffa44-0ab6-477e-a683-5876c4418d2b,
  author       = {Tudu, Jaynarayan T. and Larsson, Erik and Singh, Virendra and Singh, Adit},
  language     = {eng},
  title        = {Capture Power Reduction for Modular System-on-Chip Test},
  year         = {2009},
}