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Programming support for reconfigurable custom vector architectures

Arslan, Mehmet Ali LU ; Kuchcinski, Krzysztof LU ; Gruian, Flavius LU and Liu, Yangxurui LU (2015) PMAM 2015: The 6th International Workshop on Programming Models and Applications for Multicores and Manycores in conjunction with PPoPP 2015, 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel In Proc. PPoPP, Principles and Practice of Parallel Programming p.49-57
Abstract
High performance requirements increased the popularity of unconventional architectures. While providing better performance, such architectures are generally harder to program and generate code for. In this paper, we present our approach to ease programmability and code generation for such architectures. We present a domain specific language (DSL) for the programming part, and a constraint programming approach to scheduling with memory allocation. Our experiments on implementing a kernel extracted from a DSP appli- cation on an example reconfigurable custom architecture shows that it is possible to achieve performance close to hand-written machine code that is scheduled without memory allocation.
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
in
Proc. PPoPP, Principles and Practice of Parallel Programming
editor
Balaji, Pavan; Guo, Minyi and Huang, Zhiyi
pages
9 pages
publisher
ACM
conference name
PMAM 2015: The 6th International Workshop on Programming Models and Applications for Multicores and Manycores in conjunction with PPoPP 2015, 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel
external identifiers
  • Scopus:84942456051
ISBN
978-1-4503-3404-4
DOI
10.1145/2712386.2712399
project
HiPEC
language
English
LU publication?
yes
id
ae845c71-2e0d-42cf-ba16-4e292d8a81d7 (old id 5050650)
date added to LUP
2015-02-17 13:54:27
date last changed
2016-10-13 04:46:03
@misc{ae845c71-2e0d-42cf-ba16-4e292d8a81d7,
  abstract     = {High performance requirements increased the popularity of unconventional architectures. While providing better performance, such architectures are generally harder to program and generate code for. In this paper, we present our approach to ease programmability and code generation for such architectures. We present a domain specific language (DSL) for the programming part, and a constraint programming approach to scheduling with memory allocation. Our experiments on implementing a kernel extracted from a DSP appli- cation on an example reconfigurable custom architecture shows that it is possible to achieve performance close to hand-written machine code that is scheduled without memory allocation.},
  author       = {Arslan, Mehmet Ali and Kuchcinski, Krzysztof and Gruian, Flavius and Liu, Yangxurui},
  editor       = {Balaji, Pavan and Guo, Minyi and Huang, Zhiyi},
  isbn         = {978-1-4503-3404-4},
  language     = {eng},
  pages        = {49--57},
  publisher    = {ARRAY(0xb1804f8)},
  series       = {Proc. PPoPP, Principles and Practice of Parallel Programming},
  title        = {Programming support for reconfigurable custom vector architectures},
  url          = {http://dx.doi.org/10.1145/2712386.2712399},
  year         = {2015},
}