A VLSI architecture of the Schnorr-Euchner decoder for MIMO systems
(2004) Proceedings of the IEEE 6th Circuits and Systems Symposium on Emerging Technologies: Frontiers of Mobile and Wireless Communication 1. p.65-68- Abstract
- The lattice decoder is shown to approach the performance of Maximum-likelihood decoder for MIMO wireless systems with low complexity. A VLSI architecture of the K-best Schnorr-Euchner lattice decoder is proposed in this paper. The architecture is optimized on both algorithm and architecture levels, and supports a dynamic range of SNR [less-than or equal to] 30 dB. Compared to a conventional VLSI implementation of the lattice decoder for MIMO systems, the proposed architecture results in up to 37% computation reductions, 20% area savings and more than 5 times decoding throughput improvements. The proposed architecture is implemented with 0.35 μm technology for a system of 4 transmit/receive antennas and 16-QAM modulation. The results show... (More)
- The lattice decoder is shown to approach the performance of Maximum-likelihood decoder for MIMO wireless systems with low complexity. A VLSI architecture of the K-best Schnorr-Euchner lattice decoder is proposed in this paper. The architecture is optimized on both algorithm and architecture levels, and supports a dynamic range of SNR [less-than or equal to] 30 dB. Compared to a conventional VLSI implementation of the lattice decoder for MIMO systems, the proposed architecture results in up to 37% computation reductions, 20% area savings and more than 5 times decoding throughput improvements. The proposed architecture is implemented with 0.35 μm technology for a system of 4 transmit/receive antennas and 16-QAM modulation. The results show that a decoding throughput of 53.3 Mbits/s can be achieved, and the decoding latency is less than 2.5 μs. © 2004 IEEE. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/614730
- author
- Guo, Zhan and Nilsson, Peter LU
- organization
- publishing date
- 2004
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- MIMO, Packet error rates (PER), Schnorr-Euchner decoder, Sphere decoders
- host publication
- Proceedings of the IEEE 6th Circuits and Systems Symposium on Emerging Technologies: Frontiers of Mobile and Wireless Communication
- volume
- 1
- pages
- 65 - 68
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- Proceedings of the IEEE 6th Circuits and Systems Symposium on Emerging Technologies: Frontiers of Mobile and Wireless Communication
- conference location
- Shanghai, China
- conference dates
- 2004-05-31 - 2004-06-02
- external identifiers
-
- wos:000225421600023
- scopus:20344402087
- ISBN
- 0780379381
- DOI
- 10.1109/CASSET.2004.1322918
- language
- English
- LU publication?
- yes
- id
- b646bd7c-589c-47a0-b84a-bb0765e4a8cb (old id 614730)
- date added to LUP
- 2016-04-04 11:06:12
- date last changed
- 2022-01-29 21:20:12
@inproceedings{b646bd7c-589c-47a0-b84a-bb0765e4a8cb,
abstract = {{The lattice decoder is shown to approach the performance of Maximum-likelihood decoder for MIMO wireless systems with low complexity. A VLSI architecture of the K-best Schnorr-Euchner lattice decoder is proposed in this paper. The architecture is optimized on both algorithm and architecture levels, and supports a dynamic range of SNR [less-than or equal to] 30 dB. Compared to a conventional VLSI implementation of the lattice decoder for MIMO systems, the proposed architecture results in up to 37% computation reductions, 20% area savings and more than 5 times decoding throughput improvements. The proposed architecture is implemented with 0.35 μm technology for a system of 4 transmit/receive antennas and 16-QAM modulation. The results show that a decoding throughput of 53.3 Mbits/s can be achieved, and the decoding latency is less than 2.5 μs. © 2004 IEEE.}},
author = {{Guo, Zhan and Nilsson, Peter}},
booktitle = {{Proceedings of the IEEE 6th Circuits and Systems Symposium on Emerging Technologies: Frontiers of Mobile and Wireless Communication}},
isbn = {{0780379381}},
keywords = {{MIMO; Packet error rates (PER); Schnorr-Euchner decoder; Sphere decoders}},
language = {{eng}},
pages = {{65--68}},
publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
title = {{A VLSI architecture of the Schnorr-Euchner decoder for MIMO systems}},
url = {{http://dx.doi.org/10.1109/CASSET.2004.1322918}},
doi = {{10.1109/CASSET.2004.1322918}},
volume = {{1}},
year = {{2004}},
}