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Performance improvement for H.264 video encoding using ILP embedded processor

Iranpour, Ali LU and Kuchcinski, Krzysztof LU (2006) 9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools In 9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools p.515-521
Abstract
In this paper, we examine the impact of instruction level parallelism (ILP) on the full H.264 video encoding application and give quantitative performance measures of a superscalar architecture. Most research efforts have concentrated on the data intensive parts, such as kernels but these are taking less time from the entire execution as encoders are using new, more efficient algorithms. This important fact cannot be neglected since new video encoding standards have been proposed and the amount of other than data intensive computations has increased significantly. We observed significant improvement for the entire application when using superscalar architecture with out-of-order execution scheme. Tradeoffs in superscalar performance are... (More)
In this paper, we examine the impact of instruction level parallelism (ILP) on the full H.264 video encoding application and give quantitative performance measures of a superscalar architecture. Most research efforts have concentrated on the data intensive parts, such as kernels but these are taking less time from the entire execution as encoders are using new, more efficient algorithms. This important fact cannot be neglected since new video encoding standards have been proposed and the amount of other than data intensive computations has increased significantly. We observed significant improvement for the entire application when using superscalar architecture with out-of-order execution scheme. Tradeoffs in superscalar performance are also evaluated with combinations of measurements from simplescalar simulator (Less)
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author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
data intensive computations, superscalar architecture, instruction level parallelism embedded processor, performance improvement, H.264 video encoding standards, out-of-order execution scheme, simplescalar simulator
in
9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools
pages
7 pages
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
conference name
9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools
external identifiers
  • WOS:000242376400069
  • Scopus:34547981076
ISBN
0-7695-2609-8
DOI
10.1109/DSD.2006.77
language
English
LU publication?
yes
id
f240a37c-06b1-45b7-bf43-748181cd489e (old id 616772)
date added to LUP
2007-11-24 10:34:10
date last changed
2016-10-13 04:49:27
@misc{f240a37c-06b1-45b7-bf43-748181cd489e,
  abstract     = {In this paper, we examine the impact of instruction level parallelism (ILP) on the full H.264 video encoding application and give quantitative performance measures of a superscalar architecture. Most research efforts have concentrated on the data intensive parts, such as kernels but these are taking less time from the entire execution as encoders are using new, more efficient algorithms. This important fact cannot be neglected since new video encoding standards have been proposed and the amount of other than data intensive computations has increased significantly. We observed significant improvement for the entire application when using superscalar architecture with out-of-order execution scheme. Tradeoffs in superscalar performance are also evaluated with combinations of measurements from simplescalar simulator},
  author       = {Iranpour, Ali and Kuchcinski, Krzysztof},
  isbn         = {0-7695-2609-8},
  keyword      = {data intensive computations,superscalar architecture,instruction level parallelism embedded processor,performance improvement,H.264 video encoding standards,out-of-order execution scheme,simplescalar simulator},
  language     = {eng},
  pages        = {515--521},
  publisher    = {ARRAY(0xb4de158)},
  series       = {9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools},
  title        = {Performance improvement for H.264 video encoding using ILP embedded processor},
  url          = {http://dx.doi.org/10.1109/DSD.2006.77},
  year         = {2006},
}