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2015
Mark Method of generating data for estimating resource requirements for a circuit design
Schumacher, Paul R. ; Miller, Ian D. ; Parlour, David B. ; Janneck, Jörn ^LU and Jha, Pradip Kumar (2015) US9117046 (B1)
- Patent › Patent
2014
Mark Turnus: An open-source design space exploration framework for dynamic stream programs
Casale Brunet, Simone ; Wisniewska, Malgorzata ; Bezati, Endri ; Mattavelli, Marco and Janneck, Jörn ^LU (2014) Design and Architectures for Signal and Image Processing (DASIP) p.1-2
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Characterizing communication behavior of dataflow programs using trace analysis
Janneck, Jörn ^LU ; Casale Brunet, Simone and Mattavelli, Marco (2014) Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV) p.44-50
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Coarse grain clock gating of streaming applications in programmable logic implementations
Bezati, Endri ; Casale Brunet, Simone ; Mattavelli, Marco and Janneck, Jörn ^LU (2014) Electronic System Level Synthesis Conference (ESLsyn) p.1-6
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Finding fast action selectors for dataflow actors
Cedersjö, Gustav ^LU ; Janneck, Jörn ^LU and Skeppstedt, Jonas ^LU (2014) 48th Asilomar Conference on Signals, Systems and Computers, 2014 p.1435-1439
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Dataflow machines
Janneck, Jörn ^LU ; Cedersjö, Gustav ^LU ; Bezati, Endri and Casale Brunet, Simone (2014) 48th Asilomar Conference on Signals, Systems and Computers, 2014 p.1848-1852
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling
Canala, Massimo ; Casale Brunet, Simone ; Bezati, Endri ; Mattavelli, Marco and Janneck, Jörn ^LU (2014) 2014 IEEE Workshop on Signal Processing Systems p.1-6
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Execution trace graph analysis of dataflow programs: Bounded buffer scheduling and deadlock recovery using model predictive control
Casale Brunet, Simone ; Bezati, Endri ; Mattavelli, Marco ; Canale, Massimo and Janneck, Jörn ^LU (2014) Design and Architectures for Signal and Image Processing (DASIP) p.1-6
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
2013
Mark Design space exploration and implementation of RVC-CAL applications using the TURNUS framework
Brunet, Simone Casale ; Bezati, Endri ; Alberti, Claudio ; Roquier, Ghislain ; Mattavelli, Marco ; Janneck, Jörn ^LU and Boutellier, Jani (2013) 2013 Conference on Design and Architectures for Signal and Image Processing (DASIP) p.341-342
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Turnus: A unified dataflow design space exploration framework for heterogeneous parallel systems
Brunet, Simone Casale ; Alberti, Claudio ; Mattavelli, Marco and Janneck, Jörn ^LU (2013) 2013 Conference on Design and Architectures for Signal and Image Processing (DASIP) p.47-54
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding

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