Capture Power Reduction for Modular System-on-Chip Test
Tudu, Jaynarayan T. ; Larsson, Erik LU
; Singh, Virendra
and Singh, Adit
(2009)
IEEE/VSI VLSI Design and Test Symposium (VDAT)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/2340902
- author
- Tudu, Jaynarayan T.
; Larsson, Erik
LU
; Singh, Virendra
and Singh, Adit
- publishing date
- 2009
- type
- Contribution to conference
- publication status
- published
- subject
- conference name
- IEEE/VSI VLSI Design and Test Symposium (VDAT)
- conference location
- Bangalore, India
- conference dates
- 2009-07-08 - 2009-07-10
- language
- English
- LU publication?
- no
- id
- 0afffa44-0ab6-477e-a683-5876c4418d2b (old id 2340902)
- date added to LUP
- 2016-04-04 13:50:24
- date last changed
- 2018-11-21 21:16:39
@misc{0afffa44-0ab6-477e-a683-5876c4418d2b,
author = {{Tudu, Jaynarayan T. and Larsson, Erik and Singh, Virendra and Singh, Adit}},
language = {{eng}},
title = {{Capture Power Reduction for Modular System-on-Chip Test}},
year = {{2009}},
}