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A 0.25W fully integrated class-d audio power amplifier in 0.35um CMOS

Axholt, Andreas LU ; Oredsson, Filip ; Petersson, Tony ; Wernehag, Johan LU and Sjöland, Henrik LU orcid (2007) Norchip conference, 2007 p.46-49
Abstract
A fully integrated class-D audio power amplifier using Pulse Width Modulation (PWM) technique is presented. The output stage is an H-bridge with 5.75 min wide nMOS transistors and 15 min wide pMOS transistors, which can deliver up to 0.25 W-rms to an 16 ohm load. The chip measuring 1.2x2.4 mm(2), including pads, was fabricated in a 0.35 mu m CMOS process. It uses a single 3.3 V supply and a PWM carrier frequency of 2.5 MHz. The chip was designed and simulated with Cadence IC design tools as a student project in the course IC-project and verification at Lund University. The chip was verified and works well with a measured THD+N of 0.5% and efficiency of 76% at 0.25 W-rms output power into 16 ohm.
Please use this url to cite or link to this publication:
author
; ; ; and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
host publication
[Host publication title missing]
pages
4 pages
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
conference name
Norchip conference, 2007
conference location
Aalborg, Denmark
conference dates
2007-11-19 - 2007-11-20
external identifiers
  • wos:000257311000011
  • scopus:50249155282
ISBN
978-1-4244-1516-8
DOI
10.1109/NORCHP.2007.4481036
language
English
LU publication?
yes
id
0b1c29bc-dc0f-46a4-8553-731ae191ee19 (old id 1406817)
date added to LUP
2016-04-04 11:20:49
date last changed
2025-10-14 12:35:18
@inproceedings{0b1c29bc-dc0f-46a4-8553-731ae191ee19,
  abstract     = {{A fully integrated class-D audio power amplifier using Pulse Width Modulation (PWM) technique is presented. The output stage is an H-bridge with 5.75 min wide nMOS transistors and 15 min wide pMOS transistors, which can deliver up to 0.25 W-rms to an 16 ohm load. The chip measuring 1.2x2.4 mm(2), including pads, was fabricated in a 0.35 mu m CMOS process. It uses a single 3.3 V supply and a PWM carrier frequency of 2.5 MHz. The chip was designed and simulated with Cadence IC design tools as a student project in the course IC-project and verification at Lund University. The chip was verified and works well with a measured THD+N of 0.5% and efficiency of 76% at 0.25 W-rms output power into 16 ohm.}},
  author       = {{Axholt, Andreas and Oredsson, Filip and Petersson, Tony and Wernehag, Johan and Sjöland, Henrik}},
  booktitle    = {{[Host publication title missing]}},
  isbn         = {{978-1-4244-1516-8}},
  language     = {{eng}},
  pages        = {{46--49}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  title        = {{A 0.25W fully integrated class-d audio power amplifier in 0.35um CMOS}},
  url          = {{http://dx.doi.org/10.1109/NORCHP.2007.4481036}},
  doi          = {{10.1109/NORCHP.2007.4481036}},
  year         = {{2007}},
}