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Application of Software Design Patterns to DSP Library Design

Åström, Pontus LU and Nilsson, Peter LU (2001) 14th International Symposium on System Synthesis (ISSS 2001) In The 14th International Symposium on System Synthesis, 2001. Proceedings. p.239-243
Abstract
The design of a hardware data path library is one of the harder problems in design for reuse. Due to the appearance of hardware modeling libraries based on C++, it is possible to apply advanced software techniques to design such a library. This paper shows how software design patterns can be applied to hardware design. Design patterns yield a twofold advantage: a faster design process, and a library that is more extensible and modular than an equivalent HDL counterpart. From a VHDL-C++ design comparison we found that those factors might result in a reduction of the code size by a factor of two.
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
in
The 14th International Symposium on System Synthesis, 2001. Proceedings.
pages
239 - 243
conference name
14th International Symposium on System Synthesis (ISSS 2001)
external identifiers
  • Scopus:0034795667
ISBN
1-58113-418-5
language
English
LU publication?
yes
id
f7b8b668-c5f5-43cd-89ae-5967729b4f66 (old id 1034047)
alternative location
http://ieeexplore.ieee.org/iel5/7595/20710/00957948.pdf
date added to LUP
2008-02-22 12:56:17
date last changed
2017-01-01 08:19:37
@inproceedings{f7b8b668-c5f5-43cd-89ae-5967729b4f66,
  abstract     = {The design of a hardware data path library is one of the harder problems in design for reuse. Due to the appearance of hardware modeling libraries based on C++, it is possible to apply advanced software techniques to design such a library. This paper shows how software design patterns can be applied to hardware design. Design patterns yield a twofold advantage: a faster design process, and a library that is more extensible and modular than an equivalent HDL counterpart. From a VHDL-C++ design comparison we found that those factors might result in a reduction of the code size by a factor of two.},
  author       = {Åström, Pontus and Nilsson, Peter},
  booktitle    = {The 14th International Symposium on System Synthesis, 2001. Proceedings.},
  isbn         = {1-58113-418-5},
  language     = {eng},
  pages        = {239--243},
  title        = {Application of Software Design Patterns to DSP Library Design},
  year         = {2001},
}