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Optimization and implementation of a Viterbi decoder under flexibility constraints

Kamuf, Matthias; Öwall, Viktor LU and Anderson, John B LU (2008) In IEEE Transactions on Circuits and Systems Part 1: Regular Papers 55(8). p.2411-2422
Abstract
This paper discusses the impact of flexibility when designing a Viterbi decoder for both convolutional and TCM codes. Different trade-offs have to be considered in choosing the right architecture for the processing blocks and the resulting hardware penalty is evaluated. We study the impact of symbol quantization that degrades performance and affects the wordlength of the rate-flexible trellis datapath. A radix-2-based architecture for this datapath relaxes the hardware requirements on the branch metric and survivor path blocks substantially. The cost of flexibility in terms of cell area and power consumption is explored by an investigation of synthesized designs that provide different transmission rates. Two designs are fabricated in a... (More)
This paper discusses the impact of flexibility when designing a Viterbi decoder for both convolutional and TCM codes. Different trade-offs have to be considered in choosing the right architecture for the processing blocks and the resulting hardware penalty is evaluated. We study the impact of symbol quantization that degrades performance and affects the wordlength of the rate-flexible trellis datapath. A radix-2-based architecture for this datapath relaxes the hardware requirements on the branch metric and survivor path blocks substantially. The cost of flexibility in terms of cell area and power consumption is explored by an investigation of synthesized designs that provide different transmission rates. Two designs are fabricated in a digital 0.13- $mu{hbox {m}}$ CMOS process. Based on post-layout simulations, a symbol baud rate of 168 Mbaud/s is achieved in TCM mode, equivalent to a maximum throughput of 840 Mbit/s using a 64-QAM constellation. (Less)
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Contribution to journal
publication status
published
subject
in
IEEE Transactions on Circuits and Systems Part 1: Regular Papers
volume
55
issue
8
pages
2411 - 2422
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • wos:000259499400023
  • scopus:54749135081
ISSN
1549-8328
DOI
10.1109/TCSI.2008.918148
project
Digital ASIC: Flexible Coding and Decoding for Wireless Personal Area Networks
language
English
LU publication?
yes
id
7dd33fe6-2c5e-490c-aab0-42cc688655cc (old id 1036083)
date added to LUP
2008-02-27 11:24:27
date last changed
2017-11-12 03:30:54
@article{7dd33fe6-2c5e-490c-aab0-42cc688655cc,
  abstract     = {This paper discusses the impact of flexibility when designing a Viterbi decoder for both convolutional and TCM codes. Different trade-offs have to be considered in choosing the right architecture for the processing blocks and the resulting hardware penalty is evaluated. We study the impact of symbol quantization that degrades performance and affects the wordlength of the rate-flexible trellis datapath. A radix-2-based architecture for this datapath relaxes the hardware requirements on the branch metric and survivor path blocks substantially. The cost of flexibility in terms of cell area and power consumption is explored by an investigation of synthesized designs that provide different transmission rates. Two designs are fabricated in a digital 0.13- $mu{hbox {m}}$ CMOS process. Based on post-layout simulations, a symbol baud rate of 168 Mbaud/s is achieved in TCM mode, equivalent to a maximum throughput of 840 Mbit/s using a 64-QAM constellation.},
  author       = {Kamuf, Matthias and Öwall, Viktor and Anderson, John B},
  issn         = {1549-8328},
  language     = {eng},
  number       = {8},
  pages        = {2411--2422},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Transactions on Circuits and Systems Part 1: Regular Papers},
  title        = {Optimization and implementation of a Viterbi decoder under flexibility constraints},
  url          = {http://dx.doi.org/10.1109/TCSI.2008.918148},
  volume       = {55},
  year         = {2008},
}