Modeling and exploration of a reconfigurable architecture for digital holographic imaging
(2008) IEEE International Symposium on Circuits and Systems (ISCAS), 2008 p.248-251- Abstract
- The use of coarse-grain reconfigurable architectures (CGRA) is a suitable alternative for hardware acceleration in many application areas, including digital holographic imaging. In this paper, we propose a CGRA-based system with an array of processing and memory cells, which communicate using a local and a global communication network, and a stream memory controller to manage data transfers to external memory. We present our SystemC-based exploration environment (SCENIC) and methodology used to construct and evaluate systems containing reconfigurable architectures. A case study illustrates the advantages with rapid system level exploration to find and solve bottlenecks in complex designs prior to RTL description.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1160880
- author
- Lenart, Thomas LU ; Svensson, Henrik LU and Öwall, Viktor LU
- organization
- publishing date
- 2008
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- [Host publication title missing]
- pages
- 248 - 251
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- IEEE International Symposium on Circuits and Systems (ISCAS), 2008
- conference location
- Seattle, United States
- conference dates
- 2008-05-18 - 2008-05-21
- external identifiers
-
- wos:000258532100064
- scopus:51749092648
- ISBN
- 978-1-4244-1683-7
- DOI
- 10.1109/ISCAS.2008.4541401
- language
- English
- LU publication?
- yes
- id
- 3bfbd938-8bca-4d04-944a-ec5a1cfe1b82 (old id 1160880)
- date added to LUP
- 2016-04-04 10:40:23
- date last changed
- 2022-01-29 20:37:03
@inproceedings{3bfbd938-8bca-4d04-944a-ec5a1cfe1b82, abstract = {{The use of coarse-grain reconfigurable architectures (CGRA) is a suitable alternative for hardware acceleration in many application areas, including digital holographic imaging. In this paper, we propose a CGRA-based system with an array of processing and memory cells, which communicate using a local and a global communication network, and a stream memory controller to manage data transfers to external memory. We present our SystemC-based exploration environment (SCENIC) and methodology used to construct and evaluate systems containing reconfigurable architectures. A case study illustrates the advantages with rapid system level exploration to find and solve bottlenecks in complex designs prior to RTL description.}}, author = {{Lenart, Thomas and Svensson, Henrik and Öwall, Viktor}}, booktitle = {{[Host publication title missing]}}, isbn = {{978-1-4244-1683-7}}, language = {{eng}}, pages = {{248--251}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{Modeling and exploration of a reconfigurable architecture for digital holographic imaging}}, url = {{https://lup.lub.lu.se/search/files/5594266/1218548.pdf}}, doi = {{10.1109/ISCAS.2008.4541401}}, year = {{2008}}, }