A parallel 2Gops/s image convolution processor with low I/O bandwidth
(1995) IEEE ASIC Conference and Exhibit p.87-90- Abstract
- A customized image processor for real time convolution of an image has been developed. Image convolution requires an extensive amount of calculation capacity and I/O communication which is hard to sustain with standard processors in real time. Therefore, a customized processor has been designed with a tailored architecture. The processors have a total sustained calculation capacity of >2G arithmetic operations/s at 20 MHz clock frequency, surpassing that of TMS320C80 for this application due to the tailored architecture.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1225765
- author
- Öwall, Viktor LU ; Torkelson, Mats LU and Egelberg, Peter
- organization
- publishing date
- 1995
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- [Host publication title missing]
- pages
- 87 - 90
- conference name
- IEEE ASIC Conference and Exhibit
- conference location
- Austin, TX, United States
- conference dates
- 1995-09-18 - 1995-09-22
- external identifiers
-
- scopus:0029546025
- ISSN
- 1063-0988
- ISBN
- 0-7803-2707-1
- DOI
- 10.1109/ASIC.1995.580688
- language
- English
- LU publication?
- yes
- id
- 76898a1c-dcc8-41b0-a578-1bf9227d35e3 (old id 1225765)
- date added to LUP
- 2016-04-04 09:41:23
- date last changed
- 2021-01-03 07:39:24
@inproceedings{76898a1c-dcc8-41b0-a578-1bf9227d35e3, abstract = {{A customized image processor for real time convolution of an image has been developed. Image convolution requires an extensive amount of calculation capacity and I/O communication which is hard to sustain with standard processors in real time. Therefore, a customized processor has been designed with a tailored architecture. The processors have a total sustained calculation capacity of >2G arithmetic operations/s at 20 MHz clock frequency, surpassing that of TMS320C80 for this application due to the tailored architecture.}}, author = {{Öwall, Viktor and Torkelson, Mats and Egelberg, Peter}}, booktitle = {{[Host publication title missing]}}, isbn = {{0-7803-2707-1}}, issn = {{1063-0988}}, language = {{eng}}, pages = {{87--90}}, title = {{A parallel 2Gops/s image convolution processor with low I/O bandwidth}}, url = {{https://lup.lub.lu.se/search/files/5391297/1228171.pdf}}, doi = {{10.1109/ASIC.1995.580688}}, year = {{1995}}, }