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Design space exploration for optimal memory mapping of data and instructions in multimedia applications to scratch-pad memories

Iranpour, Ali and Kuchcinski, Krzysztof LU orcid (2009) ESTIMedia 2009, 7th IEEE Workshop on Embedded Systems for Real-Time Multimedia p.89-95
Abstract
In this paper, we propose a new methodology for optimal memory mapping of data and instructions to Scratch-Pad Memories (SPM). In the mapping process, we optimize, as the main priority, the number of memory accesses to minimize power consumption. Minimization of external memory accesses lowers switching activity and therefore power consumption. The optimization is done by finding Pareto-points, using multi-objective optimization that combines different cost functions. Our methodology is intended to be used in real-life situations in industry where there is often a need for mapping third party applications to a specific architecture. For evaluating our methodology, we also use commercial video H.264 and audio eAAC+ applications. Our... (More)
In this paper, we propose a new methodology for optimal memory mapping of data and instructions to Scratch-Pad Memories (SPM). In the mapping process, we optimize, as the main priority, the number of memory accesses to minimize power consumption. Minimization of external memory accesses lowers switching activity and therefore power consumption. The optimization is done by finding Pareto-points, using multi-objective optimization that combines different cost functions. Our methodology is intended to be used in real-life situations in industry where there is often a need for mapping third party applications to a specific architecture. For evaluating our methodology, we also use commercial video H.264 and audio eAAC+ applications. Our experiments show that SPM is well suited for these applications for reducing external accesses to reduce power consumption but has limited significance on overall performance improvements. The proposed methodology provides a way to combine SPMs with caches to optimally use this memory architecture. Our experiments indicate high accuracy of our methodology for predicting SPM and external memory accesses. We have obtained 90% accuracy between results of our methodology and results for executing applications on a given architecture. (Less)
Please use this url to cite or link to this publication:
author
and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
eAAC+, memory mapping, multimedia applications, component, Scratch-pad memory, Pareto-point, H264, Design space exploration
host publication
[Host publication title missing]
pages
89 - 95
conference name
ESTIMedia 2009, 7th IEEE Workshop on Embedded Systems for Real-Time Multimedia
conference location
Genoble, France
conference dates
2009-10-15 - 2009-10-16
external identifiers
  • wos:000278571300011
  • scopus:74549225135
ISBN
978-1-4244-5169-2
DOI
10.1109/ESTMED.2009.5336826
language
English
LU publication?
yes
id
d4949260-4793-4afc-8239-707640afb8bd (old id 1504629)
date added to LUP
2016-04-04 13:40:17
date last changed
2021-06-16 02:13:11
@inproceedings{d4949260-4793-4afc-8239-707640afb8bd,
  abstract     = {In this paper, we propose a new methodology for optimal memory mapping of data and instructions to Scratch-Pad Memories (SPM). In the mapping process, we optimize, as the main priority, the number of memory accesses to minimize power consumption. Minimization of external memory accesses lowers switching activity and therefore power consumption. The optimization is done by finding Pareto-points, using multi-objective optimization that combines different cost functions. Our methodology is intended to be used in real-life situations in industry where there is often a need for mapping third party applications to a specific architecture. For evaluating our methodology, we also use commercial video H.264 and audio eAAC+ applications. Our experiments show that SPM is well suited for these applications for reducing external accesses to reduce power consumption but has limited significance on overall performance improvements. The proposed methodology provides a way to combine SPMs with caches to optimally use this memory architecture. Our experiments indicate high accuracy of our methodology for predicting SPM and external memory accesses. We have obtained 90% accuracy between results of our methodology and results for executing applications on a given architecture.},
  author       = {Iranpour, Ali and Kuchcinski, Krzysztof},
  booktitle    = {[Host publication title missing]},
  isbn         = {978-1-4244-5169-2},
  language     = {eng},
  pages        = {89--95},
  title        = {Design space exploration for optimal memory mapping of data and instructions in multimedia applications to scratch-pad memories},
  url          = {http://dx.doi.org/10.1109/ESTMED.2009.5336826},
  doi          = {10.1109/ESTMED.2009.5336826},
  year         = {2009},
}