Automatic design of application-specific reconfigurable processor extensions with UPaK synthesis kernel
Wolinski, Christophe ; Kuchcinski, Krzysztof LU
and Raffin, Erwan
(2009)
In ACM Transactions on Design Automation of Electronic Systems
15(1).
p.1-36
- Abstract
- This article presents a new tool for automatic design of application-specific reconfigurable processor extensions based on UPaK (Abstract Unified Patterns Based Synthesis Kernel for Hardware and Software Systems). We introduce a complete design flow that identifies new instructions, selects specific instructions and schedules a considered application on the newly created reconfigurable architecture. The identified extensions are implemented as specialized sequential or parallel instructions. These instructions are executed on a reconfigurable unit implementing all merged patterns. Our method uses specially developed algorithms for subgraph isomorphism that are implemented as graph matching constraints. These constraints together with... (More)
- This article presents a new tool for automatic design of application-specific reconfigurable processor extensions based on UPaK (Abstract Unified Patterns Based Synthesis Kernel for Hardware and Software Systems). We introduce a complete design flow that identifies new instructions, selects specific instructions and schedules a considered application on the newly created reconfigurable architecture. The identified extensions are implemented as specialized sequential or parallel instructions. These instructions are executed on a reconfigurable unit implementing all merged patterns. Our method uses specially developed algorithms for subgraph isomorphism that are implemented as graph matching constraints. These constraints together with separate algorithms are able to efficiently identify computational patterns and carry out application mapping and scheduling. Our methods can handle both time-constrained and resource-constrained scheduling. Experimental results show that the presented method provides high coverage of application graphs with small number of patterns and ensures high application execution speedup both for sequential and parallel application execution with reconfigurable processor extensions implementing selected patterns. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1523182
- author
- Wolinski, Christophe
; Kuchcinski, Krzysztof
LU
and Raffin, Erwan
- organization
- publishing date
- 2009
- type
- Contribution to journal
- publication status
- published
- subject
- in
- ACM Transactions on Design Automation of Electronic Systems
- volume
- 15
- issue
- 1
- pages
- 1 - 36
- publisher
- Association for Computing Machinery (ACM)
- external identifiers
-
- wos:000273323600001
- scopus:74049161644
- ISSN
- 1084-4309
- DOI
- 10.1145/1640457.1640458
- project
- Embedded Applications Software Engineering
- language
- English
- LU publication?
- yes
- id
- cdfdbe58-ca02-4fba-abf5-bdf27fd5819a (old id 1523182)
- date added to LUP
- 2016-04-01 13:55:39
- date last changed
- 2022-01-27 21:54:48
@article{cdfdbe58-ca02-4fba-abf5-bdf27fd5819a,
abstract = {{This article presents a new tool for automatic design of application-specific reconfigurable processor extensions based on UPaK (Abstract Unified Patterns Based Synthesis Kernel for Hardware and Software Systems). We introduce a complete design flow that identifies new instructions, selects specific instructions and schedules a considered application on the newly created reconfigurable architecture. The identified extensions are implemented as specialized sequential or parallel instructions. These instructions are executed on a reconfigurable unit implementing all merged patterns. Our method uses specially developed algorithms for subgraph isomorphism that are implemented as graph matching constraints. These constraints together with separate algorithms are able to efficiently identify computational patterns and carry out application mapping and scheduling. Our methods can handle both time-constrained and resource-constrained scheduling. Experimental results show that the presented method provides high coverage of application graphs with small number of patterns and ensures high application execution speedup both for sequential and parallel application execution with reconfigurable processor extensions implementing selected patterns.}},
author = {{Wolinski, Christophe and Kuchcinski, Krzysztof and Raffin, Erwan}},
issn = {{1084-4309}},
language = {{eng}},
number = {{1}},
pages = {{1--36}},
publisher = {{Association for Computing Machinery (ACM)}},
series = {{ACM Transactions on Design Automation of Electronic Systems}},
title = {{Automatic design of application-specific reconfigurable processor extensions with UPaK synthesis kernel}},
url = {{http://dx.doi.org/10.1145/1640457.1640458}},
doi = {{10.1145/1640457.1640458}},
volume = {{15}},
year = {{2009}},
}