A 5.4GHz wide tuning range CMOS PLL using an auto-calibration multiple-pass ring oscillator
(2009) IEEE international SOC conference, SOCC 2009 p.39-42- Abstract
- A 5.4GHz multiple-pass ring voltage controlled oscillator (VCO) based phase-locked loop (PLL) is described. For the sake of active devices’ sensitivity to process and temperature regarding ring oscillators, an effective automatic frequency calibration scheme is proposed. A new process-independent differential to single (DTOS) is
used to adjust control voltage range and loop gain. The chip is implemented in 0.18-um CMOS process
and achieves phase noise of -100dBc/Hz@1MHz
and a 40% tuning range.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1667533
- author
- Lu, Ping LU ; Chen, Danfeng and Ren, Junyan
- organization
- publishing date
- 2009
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- [Host publication title missing]
- pages
- 39 - 42
- conference name
- IEEE international SOC conference, SOCC 2009
- conference location
- Ireland
- conference dates
- 2009-09-09 - 2009-09-11
- external identifiers
-
- scopus:77949594290
- ISBN
- 978-1-4244-4940-8
- DOI
- 10.1109/SOCCON.2009.5398102
- language
- English
- LU publication?
- yes
- id
- b18e03f7-6a40-4e3c-a38a-1b0fe680e83e (old id 1667533)
- date added to LUP
- 2016-04-04 14:41:43
- date last changed
- 2022-01-30 02:27:55
@inproceedings{b18e03f7-6a40-4e3c-a38a-1b0fe680e83e, abstract = {{A 5.4GHz multiple-pass ring voltage controlled oscillator (VCO) based phase-locked loop (PLL) is described. For the sake of active devices’ sensitivity to process and temperature regarding ring oscillators, an effective automatic frequency calibration scheme is proposed. A new process-independent differential to single (DTOS) is<br/><br> used to adjust control voltage range and loop gain. The chip is implemented in 0.18-um CMOS process<br/><br> and achieves phase noise of -100dBc/Hz@1MHz<br/><br> and a 40% tuning range.}}, author = {{Lu, Ping and Chen, Danfeng and Ren, Junyan}}, booktitle = {{[Host publication title missing]}}, isbn = {{978-1-4244-4940-8}}, language = {{eng}}, pages = {{39--42}}, title = {{A 5.4GHz wide tuning range CMOS PLL using an auto-calibration multiple-pass ring oscillator}}, url = {{http://dx.doi.org/10.1109/SOCCON.2009.5398102}}, doi = {{10.1109/SOCCON.2009.5398102}}, year = {{2009}}, }