Trace-based manycore partitioning of stream-processing applications
(2017) 50th Asilomar Conference on Signals, Systems and Computers, ACSSC 2016 p.422-426- Abstract
Application performance on these processor array platforms is highly sensitive to how functionality is physically placed on the device, as this choice crucially determines communication latencies and congestion patterns of the on-chip inter-core communication. The problem of identifying the best, or just a good enough, partitioning and placement does not, in general, admit to an analytic solution, and its combinatorial nature makes solving it by pure experimentation impractical. This paper presents an approach that maps stream programs onto processor arrays using trace analysis as a technique for evaluating candidate solutions and for suggesting alternatives.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1924fe38-008f-4b3e-86db-8b93658f1491
- author
- Michalska-Jakubus, Malgorzata ; Casale Brunet, Simone ; Bezati, Endri ; Mattavelli, Marco and Janneck, J. LU
- organization
- publishing date
- 2017-03-01
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- dataflow, execution trace, manycore, partitioning, profiling
- host publication
- Conference Record of the 50th Asilomar Conference on Signals, Systems and Computers, ACSSC 2016
- article number
- 7869073
- pages
- 5 pages
- publisher
- IEEE Computer Society
- conference name
- 50th Asilomar Conference on Signals, Systems and Computers, ACSSC 2016
- conference location
- Pacific Grove, United States
- conference dates
- 2016-11-06 - 2016-11-09
- external identifiers
-
- scopus:85016319410
- ISBN
- 9781538639542
- DOI
- 10.1109/ACSSC.2016.7869073
- language
- English
- LU publication?
- yes
- id
- 1924fe38-008f-4b3e-86db-8b93658f1491
- date added to LUP
- 2017-04-12 15:08:14
- date last changed
- 2022-02-14 18:37:03
@inproceedings{1924fe38-008f-4b3e-86db-8b93658f1491, abstract = {{<p>Application performance on these processor array platforms is highly sensitive to how functionality is physically placed on the device, as this choice crucially determines communication latencies and congestion patterns of the on-chip inter-core communication. The problem of identifying the best, or just a good enough, partitioning and placement does not, in general, admit to an analytic solution, and its combinatorial nature makes solving it by pure experimentation impractical. This paper presents an approach that maps stream programs onto processor arrays using trace analysis as a technique for evaluating candidate solutions and for suggesting alternatives.</p>}}, author = {{Michalska-Jakubus, Malgorzata and Casale Brunet, Simone and Bezati, Endri and Mattavelli, Marco and Janneck, J.}}, booktitle = {{Conference Record of the 50th Asilomar Conference on Signals, Systems and Computers, ACSSC 2016}}, isbn = {{9781538639542}}, keywords = {{dataflow; execution trace; manycore; partitioning; profiling}}, language = {{eng}}, month = {{03}}, pages = {{422--426}}, publisher = {{IEEE Computer Society}}, title = {{Trace-based manycore partitioning of stream-processing applications}}, url = {{http://dx.doi.org/10.1109/ACSSC.2016.7869073}}, doi = {{10.1109/ACSSC.2016.7869073}}, year = {{2017}}, }