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Implementation of a Scalable Matrix Inversion Architecture for Triangular Matrices

Edman, Fredrik LU orcid and Öwall, Viktor LU (2003) Personal, Indoor and Mobile Radio Communications (PIMRC) 3. p.2558-2562
Abstract
This paper presents an FPGA implementation of a

novel snd Ihighl! scalable hardware architecture for inversion of triangiiliir matrices. An integral part of modern signal processing and communications applications involves manipulation of large matrices. Therefore, scalable and flexible hardware architectures

are increasingly sought for. In this paper the traditional

triangular shaped array architecture with n(n+l)/Z, where n

being the number of inputs, communicating processors are

mapped to a linear structure with only n processors. We show that the linear array structure avoids drawbacks such as nonscalability, large area and large power consumption. The implementation is based on a numerical... (More)
This paper presents an FPGA implementation of a

novel snd Ihighl! scalable hardware architecture for inversion of triangiiliir matrices. An integral part of modern signal processing and communications applications involves manipulation of large matrices. Therefore, scalable and flexible hardware architectures

are increasingly sought for. In this paper the traditional

triangular shaped array architecture with n(n+l)/Z, where n

being the number of inputs, communicating processors are

mapped to a linear structure with only n processors. We show that the linear array structure avoids drawbacks such as nonscalability, large area and large power consumption. The implementation is based on a numerical stable recurrence algorithm which has excellent properties for hardware implementation. The implementation is the core processor in a smart antenna system. (Less)
Please use this url to cite or link to this publication:
author
and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
host publication
[Host publication title missing]
volume
3
pages
5 pages
conference name
Personal, Indoor and Mobile Radio Communications (PIMRC)
conference location
Beijing, China
conference dates
0001-01-02
external identifiers
  • wos:000188739500526
  • scopus:79955638811
DOI
10.1109/PIMRC.2003.1259188
language
English
LU publication?
yes
id
19d34099-cdf0-4206-bb9a-78f49ddf459e (old id 602759)
date added to LUP
2016-04-04 13:41:56
date last changed
2023-01-06 02:51:40
@inproceedings{19d34099-cdf0-4206-bb9a-78f49ddf459e,
  abstract     = {{This paper presents an FPGA implementation of a<br/><br>
novel snd Ihighl! scalable hardware architecture for inversion of triangiiliir matrices. An integral part of modern signal processing and communications applications involves manipulation of large matrices. Therefore, scalable and flexible hardware architectures<br/><br>
are increasingly sought for. In this paper the traditional<br/><br>
triangular shaped array architecture with n(n+l)/Z, where n<br/><br>
being the number of inputs, communicating processors are<br/><br>
mapped to a linear structure with only n processors. We show that the linear array structure avoids drawbacks such as nonscalability, large area and large power consumption. The implementation is based on a numerical stable recurrence algorithm which has excellent properties for hardware implementation. The implementation is the core processor in a smart antenna system.}},
  author       = {{Edman, Fredrik and Öwall, Viktor}},
  booktitle    = {{[Host publication title missing]}},
  language     = {{eng}},
  pages        = {{2558--2562}},
  title        = {{Implementation of a Scalable Matrix Inversion Architecture for Triangular Matrices}},
  url          = {{http://dx.doi.org/10.1109/PIMRC.2003.1259188}},
  doi          = {{10.1109/PIMRC.2003.1259188}},
  volume       = {{3}},
  year         = {{2003}},
}