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Scan Cells Reordering to Minimize Peak Power During Test Cycle : A Graph Theoretic Approach

Tudu, Jaynarayan T. ; Larsson, Erik LU orcid ; Singh, Virendra and Fujiwara, Hideo (2010) IEEE European Test Symposium (ETS'10), 2010 p.259-259
Abstract
Scan circuit is widely practiced DFT technology. The scan testing procedure consist of state initialization, test application, response capture and observation process. During the state initialization process the scan vectors are shifted into the scan cells and simultaneously the responses captured in last cycle are shifted out. During this shift operation the transitions that arise in the scan cells are propagated to the combinational circuit, which inturn create many more toggling activities in the combinational block and hence increases the dynamic power consumption. The dynamic power consumed during scan shift operation is much more higher than that of normal mode operation.
Please use this url to cite or link to this publication:
author
; ; and
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
host publication
[Host publication title missing]
pages
259 - 259
conference name
IEEE European Test Symposium (ETS'10), 2010
conference location
Prague, Czech Republic
conference dates
2010-05-24 - 2010-05-28
external identifiers
  • scopus:78049258396
DOI
10.1109/ETSYM.2010.5512732
language
English
LU publication?
no
id
1cdb0482-1aca-4f09-858e-2c02e066d4f8 (old id 2340837)
date added to LUP
2016-04-04 12:57:15
date last changed
2022-01-29 23:35:53
@inproceedings{1cdb0482-1aca-4f09-858e-2c02e066d4f8,
  abstract     = {{Scan circuit is widely practiced DFT technology. The scan testing procedure consist of state initialization, test application, response capture and observation process. During the state initialization process the scan vectors are shifted into the scan cells and simultaneously the responses captured in last cycle are shifted out. During this shift operation the transitions that arise in the scan cells are propagated to the combinational circuit, which inturn create many more toggling activities in the combinational block and hence increases the dynamic power consumption. The dynamic power consumed during scan shift operation is much more higher than that of normal mode operation.}},
  author       = {{Tudu, Jaynarayan T. and Larsson, Erik and Singh, Virendra and Fujiwara, Hideo}},
  booktitle    = {{[Host publication title missing]}},
  language     = {{eng}},
  pages        = {{259--259}},
  title        = {{Scan Cells Reordering to Minimize Peak Power During Test Cycle : A Graph Theoretic Approach}},
  url          = {{http://dx.doi.org/10.1109/ETSYM.2010.5512732}},
  doi          = {{10.1109/ETSYM.2010.5512732}},
  year         = {{2010}},
}