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Digital implementation of a wavelet-based event detector for cardiac pacemakers

Rodrigues, Joachim LU ; Olsson, Thomas LU ; Sörnmo, Leif LU and Öwall, Viktor LU (2005) In IEEE Transactions on Circuits and Systems Part 1: Fundamental Theory and Applications 52(12). p.2686-2698
Abstract
This paper presents a digital hardware implementation of a novel wavelet-based event detector suitable for the next generation of cardiac pacemakers. Significant power savings are achieved by introducing a second operation mode that shuts down 2/3 of the hardware for long time periods when the pacemaker patient is not exposed to noise, while not degrading performance. Due to a 0.13-mu m CMOS technology and the low clock frequency of 1 kHz, leakage power becomes the dominating power source. By introducing sleep transistors in the power-supply rails, leakage power of the hardware being shut off is reduced by 97%. Power estimation on RTL-level shows that the overall power consumption is reduced by 67% with a dual operation mode. Under these... (More)
This paper presents a digital hardware implementation of a novel wavelet-based event detector suitable for the next generation of cardiac pacemakers. Significant power savings are achieved by introducing a second operation mode that shuts down 2/3 of the hardware for long time periods when the pacemaker patient is not exposed to noise, while not degrading performance. Due to a 0.13-mu m CMOS technology and the low clock frequency of 1 kHz, leakage power becomes the dominating power source. By introducing sleep transistors in the power-supply rails, leakage power of the hardware being shut off is reduced by 97%. Power estimation on RTL-level shows that the overall power consumption is reduced by 67% with a dual operation mode. Under these conditions, the detector is expected to operate in the sub-mu W region. Detection performance is evaluated by means of databases containing electrograms to which five types of exogenic and endogenic interferences are added. The results show that reliable detection is obtained at moderate and low signal to noise-ratios (SNRs). Average detection performance in terms of detected events and false alarms for 25-dB SNR is P-D = 0.98 and P-FA = 0.014, respectively. (Less)
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author
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
cardiac pacemaker, event detector, gated supply, sleep transistors, wavelet filter
in
IEEE Transactions on Circuits and Systems Part 1: Fundamental Theory and Applications
volume
52
issue
12
pages
2686 - 2698
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • wos:000233946100019
  • scopus:29344474929
ISSN
1057-7122
DOI
10.1109/TCSI.2005.857925
language
English
LU publication?
yes
id
04f17314-5499-4ec3-8611-bde00525293a (old id 210930)
date added to LUP
2007-08-10 08:54:35
date last changed
2017-08-13 04:18:59
@article{04f17314-5499-4ec3-8611-bde00525293a,
  abstract     = {This paper presents a digital hardware implementation of a novel wavelet-based event detector suitable for the next generation of cardiac pacemakers. Significant power savings are achieved by introducing a second operation mode that shuts down 2/3 of the hardware for long time periods when the pacemaker patient is not exposed to noise, while not degrading performance. Due to a 0.13-mu m CMOS technology and the low clock frequency of 1 kHz, leakage power becomes the dominating power source. By introducing sleep transistors in the power-supply rails, leakage power of the hardware being shut off is reduced by 97%. Power estimation on RTL-level shows that the overall power consumption is reduced by 67% with a dual operation mode. Under these conditions, the detector is expected to operate in the sub-mu W region. Detection performance is evaluated by means of databases containing electrograms to which five types of exogenic and endogenic interferences are added. The results show that reliable detection is obtained at moderate and low signal to noise-ratios (SNRs). Average detection performance in terms of detected events and false alarms for 25-dB SNR is P-D = 0.98 and P-FA = 0.014, respectively.},
  author       = {Rodrigues, Joachim and Olsson, Thomas and Sörnmo, Leif and Öwall, Viktor},
  issn         = {1057-7122},
  keyword      = {cardiac pacemaker,event detector,gated supply,sleep transistors,wavelet filter},
  language     = {eng},
  number       = {12},
  pages        = {2686--2698},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Transactions on Circuits and Systems Part 1: Fundamental Theory and Applications},
  title        = {Digital implementation of a wavelet-based event detector for cardiac pacemakers},
  url          = {http://dx.doi.org/10.1109/TCSI.2005.857925},
  volume       = {52},
  year         = {2005},
}